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authorNatanael Copa <ncopa@alpinelinux.org>2011-05-02 14:06:23 +0000
committerNatanael Copa <ncopa@alpinelinux.org>2011-05-02 14:32:54 +0000
commit86719178c41db9670e90503b788edb84c131ae2e (patch)
tree9cbdb65438a5a70fe541609246d81ea411ce1f9f
parent36ad57c8dbd8adc17ad79dcbe702289e3a4758e4 (diff)
downloadalpine_aports-86719178c41db9670e90503b788edb84c131ae2e.tar.bz2
alpine_aports-86719178c41db9670e90503b788edb84c131ae2e.tar.xz
alpine_aports-86719178c41db9670e90503b788edb84c131ae2e.zip
main/xf86-video-openchrome: add fixes from upstreram
Diffstat
-rw-r--r--main/xf86-video-openchrome/APKBUILD30
-rw-r--r--main/xf86-video-openchrome/openchrome-0.2.904-fix_tvout_flickering.patch35
-rw-r--r--main/xf86-video-openchrome/openchrome-0.2.904-svn916.patch4365
-rw-r--r--main/xf86-video-openchrome/openchrome.xinf39
4 files changed, 4464 insertions, 5 deletions
diff --git a/main/xf86-video-openchrome/APKBUILD b/main/xf86-video-openchrome/APKBUILD
index 982dc24443..0f1785cf8a 100644
--- a/main/xf86-video-openchrome/APKBUILD
+++ b/main/xf86-video-openchrome/APKBUILD
@@ -1,7 +1,7 @@
1# Maintainer: Natanael Copa <ncopa@alpinelinux.org> 1# Maintainer: Natanael Copa <ncopa@alpinelinux.org>
2pkgname=xf86-video-openchrome 2pkgname=xf86-video-openchrome
3pkgver=0.2.904 3pkgver=0.2.904
4pkgrel=5 4pkgrel=6
5pkgdesc="X.Org driver for VIA/S3G cards" 5pkgdesc="X.Org driver for VIA/S3G cards"
6url="http://xorg.freedesktop.org/" 6url="http://xorg.freedesktop.org/"
7arch="all" 7arch="all"
@@ -12,18 +12,38 @@ makedepends="pkgconfig xorg-server-dev libxi-dev libxvmc-dev fontsproto glproto
12 randrproto videoproto renderproto xf86driproto mesa-dev 12 randrproto videoproto renderproto xf86driproto mesa-dev
13 " 13 "
14 14
15source="http://www.openchrome.org/releases/xf86-video-openchrome-$pkgver.tar.bz2" 15source="http://www.openchrome.org/releases/xf86-video-openchrome-$pkgver.tar.bz2
16 openchrome-0.2.904-svn916.patch
17 openchrome-0.2.904-fix_tvout_flickering.patch
18 openchrome.xinf
19 "
16 20
21_builddir="$srcdir"/$pkgname-$pkgver
22prepare() {
23 cd "$_builddir"
24 for i in $source; do
25 case $i in
26 *.patch) msg $i; patch -p1 -i "$srcdir"/$i || return 1;;
27 esac
28 done
29}
30
17build() { 31build() {
18 cd "$srcdir"/$pkgname-$pkgver 32 cd "$_builddir"
19 export LDFLAGS="$LDFLAGS -Wl,-z,lazy" 33 export LDFLAGS="$LDFLAGS -Wl,-z,lazy"
20 ./configure --prefix=/usr || return 1 34 ./configure --prefix=/usr || return 1
21 make || return 1 35 make || return 1
22} 36}
23 37
24package() { 38package() {
25 cd "$srcdir"/$pkgname-$pkgver 39 cd "$_builddir"
26 make DESTDIR="$pkgdir" install || return 1 40 make DESTDIR="$pkgdir" install || return 1
27 install -Dm644 COPYING "$pkgdir"/usr/share/licenses/$pkgname/COPYING 41 install -Dm644 COPYING "$pkgdir"/usr/share/licenses/$pkgname/COPYING
42 install -Dm644 "$srcdir"/openchrome.xinf \
43 "$pkgdir"/usr/share/hwdata/videoaliases/openchrome.xinf
28} 44}
29md5sums="f2481d98ef54febf5bffbb88a2a2426d xf86-video-openchrome-0.2.904.tar.bz2" 45
46md5sums="f2481d98ef54febf5bffbb88a2a2426d xf86-video-openchrome-0.2.904.tar.bz2
47aa0b1e76e3fc531aa487779dc5e1d1cc openchrome-0.2.904-svn916.patch
48cc7dff654c8363c61e8a77e0a12ea4fc openchrome-0.2.904-fix_tvout_flickering.patch
49d6906087f0e93ea2d98e553f4dfbcc97 openchrome.xinf"
diff --git a/main/xf86-video-openchrome/openchrome-0.2.904-fix_tvout_flickering.patch b/main/xf86-video-openchrome/openchrome-0.2.904-fix_tvout_flickering.patch
new file mode 100644
index 0000000000..7a7b5d8a88
--- /dev/null
+++ b/main/xf86-video-openchrome/openchrome-0.2.904-fix_tvout_flickering.patch
@@ -0,0 +1,35 @@
1Index: src/via_vt162x.c
2===================================================================
3--- a/src/via_vt162x.c (revision 787)
4+++ b/src/via_vt162x.c (revision 786)
5@@ -684,30 +650,11 @@ VT1622ModeI2C(ScrnInfoPtr pScrn, DisplayModePtr mo
6 xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x2B, Table.RGB[4]);
7 if (Table.RGB[5])
8 xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x2C, Table.RGB[5]);
9- if (pBIOSInfo->TVEncoder == VIA_VT1625) {
10- if (pBIOSInfo->TVType < TVTYPE_480P) {
11- xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x02, 0x12);
12- xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x23, 0x7E);
13- xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x4A, 0x85);
14- xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x4B, 0x0A);
15- xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x4E, 0x00);
16- } else {
17- xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x02, 0x12);
18- xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x4A, 0x85);
19- xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x4B, 0x0A);
20- }
21- }
22 } else if (pBIOSInfo->TVOutput == TVOUTPUT_YCBCR) {
23 xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x02, 0x03);
24 xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x65, Table.YCbCr[0]);
25 xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x66, Table.YCbCr[1]);
26 xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x67, Table.YCbCr[2]);
27- if (pBIOSInfo->TVEncoder == VIA_VT1625) {
28- if (pBIOSInfo->TVType < TVTYPE_480P) {
29- xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x23, 0x7E);
30- xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x4E, 0x00);
31- }
32- }
33 }
34
35 /* Configure flicker filter. */
diff --git a/main/xf86-video-openchrome/openchrome-0.2.904-svn916.patch b/main/xf86-video-openchrome/openchrome-0.2.904-svn916.patch
new file mode 100644
index 0000000000..c3f659efa2
--- /dev/null
+++ b/main/xf86-video-openchrome/openchrome-0.2.904-svn916.patch
@@ -0,0 +1,4365 @@
1Index: ChangeLog
2===================================================================
3--- a/ChangeLog (.../tags/release_0_2_904) (revision 916)
4+++ b/ChangeLog (.../trunk) (revision 916)
5@@ -1,3 +1,219 @@
6+2011-01-23 Bartosz Kosiorek <gang65@poczta.onet.pl>
7+
8+ Enable hardware cursor for VX900
9+
10+ * src/via_cursor.c: (viaHWCursorInit):
11+ * src/via_mode.c: (ViaModeSet):
12+
13+2010-12-16 Bartosz Kosiorek <gang65@poczta.onet.pl>
14+
15+ Merge vx900_branch - initial VX900 support
16+
17+ * src/via_accel.c: (viaFlushPCI), (viaDisableVQ),
18+ (viaInitialize2DEngine), (viaAccelSync), (viaPitchHelper),
19+ (viaInitXAA):
20+ * src/via_bandwidth.c: (ViaSetPrimaryFIFO), (ViaSetSecondaryFIFO):
21+ * src/via_bios.h:
22+ * src/via_crtc.c: (ViaFirstCRTCSetMode), (ViaSecondCRTCSetMode):
23+ * src/via_cursor.c: (viaHWCursorInit), (viaCursorStore),
24+ (viaCursorRestore), (viaShowCursor), (viaHideCursor),
25+ (viaSetCursorPosition), (viaLoadCursorImage), (viaSetCursorColors):
26+ * src/via_driver.c: (VIASetupDefaultOptions), (VIAPreInit),
27+ (VIALeaveVT), (VIASave), (VIARestore), (ViaMMIOEnable),
28+ (ViaMMIODisable), (VIAMapFB), (VIAWriteMode), (VIACloseScreen):
29+ * src/via_driver.h:
30+ * src/via_id.c:
31+ * src/via_id.h:
32+ * src/via_mode.c: (ViaDFPDetect), (ViaOutputsDetect),
33+ (ViaOutputsSelect), (ViaGetMemoryBandwidth), (ViaSetDotclock),
34+ (ViaModeSet):
35+ * src/via_mode.h:
36+ * src/via_panel.c: (ViaPanelScaleDisable), (ViaPanelPreInit),
37+ (ViaPanelGetSizeFromDDC):
38+ * src/via_video.c: (DecideOverlaySupport):
39+ * src/via_xvmc.c: (ViaInitXVMC):
40+
41+2010-12-15 Bartosz Kosiorek <gang65@poczta.onet.pl>
42+
43+ Enable the new mode switch and panel support on K8M800 and VM800 chipsets
44+
45+ * src/via_driver.c: (VIASetupDefaultOptions), (VIAPreInit):
46+ * src/via_mode.c: (ViaModeSet):
47+
48+2010-11-10 Bartosz Kosiorek <gang65@poczta.onet.pl>
49+
50+ Replace the deprecated functions
51+ xalloc/xrealloc/xfree/xcalloc with
52+ malloc/realloc/free/calloc.
53+ Refer to "/xserver/include/os.h"
54+
55+ * src/via_accel.c: (viaSetupCBuffer), (viaTearDownCBuffer),
56+ (viaInitExa), (viaExitAccel), (viaFinishInitAccel):
57+ * src/via_dga.c: (VIASetupDGAMode):
58+ * src/via_dri.c: (VIAInitVisualConfigs), (VIADRIScreenInit),
59+ (VIADRICloseScreen):
60+ * src/via_driver.c: (VIAFreeRec), (VIAProbe), (VIAPreInit),
61+ (VIACloseScreen):
62+ * src/via_memcpy.c: (viaVidCopyInit):
63+ * src/via_swov.c: (Upd_Video):
64+ * src/via_vbe.c: (ViaVbeSetMode):
65+ * src/via_video.c: (viaExitVideo), (viaStopVideo),
66+ (viaDmaBlitImage):
67+ * src/via_xvmc.c: (cleanupViaXvMC), (ViaCleanupXVMC),
68+ (ViaXvMCCreateContext), (ViaXvMCCreateSurface),
69+ (ViaXvMCCreateSubpicture), (ViaXvMCDestroyContext),
70+ (ViaXvMCDestroySurface), (ViaXvMCDestroySubpicture),
71+ (viaXvMCInitXv):
72+
73+2010-10-24 Bartosz Kosiorek <gang65@poczta.onet.pl>
74+
75+ Siragon ML-6200 laptop support
76+
77+ * src/via_id.c:
78+
79+2010-06-24 Jon Nettleton <jon.nettleton@gmail.com>
80+
81+ PM800 also uses the CME Engine. Setup the hqv_cme_regs
82+ for it.
83+
84+ * src/via_swov.c: (VIAVidHWDiffInit):
85+
86+2010-06-09 Bartosz Kosiorek <gang65@poczta.onet.pl>
87+
88+ Fix freeze on 64bit system for K8M800 chipset
89+
90+ * src/via_dri.c: (VIADRIAgpInit):
91+
92+2010-05-04 Jon Nettleton <jon.nettleton@gmail.com>
93+
94+ Re-enable the Virtual Queue for the VX800/VX855 chipsets.
95+
96+ * src/via_accel.c: (viaDisableVQ), (viaInitialize2DEngine):
97+
98+2010-05-04 Jon Nettleton <jon.nettleton@gmail.com>
99+
100+ Disable certain hardware clipping options for the VX855.
101+ These cause the 2d engine to become unstable when in
102+ 16-bit mode.
103+
104+ * src/via_accel.c: (viaInitXAA):
105+
106+2010-05-04 Jon Nettleton <jon.nettleton@gmail.com>
107+
108+ Add an undocumented option which allows certain I2C buses
109+ to be probed at startup. This allows workarounds for custom
110+ chipset makers that have used the VX855 I2C buses for other
111+ purposes.
112+
113+ * src/via_bios.h:
114+ * src/via_driver.c: (VIASetupDefaultOptions), (VIAPreInit):
115+ * src/via_driver.h:
116+ * src/via_i2c.c:
117+
118+2010-05-04 Jon Nettleton <jon.nettleton@gmail.com>
119+
120+ Improve 2d performance on chipsets that don't have
121+ AGP/PCIe support yet.
122+
123+ * src/via_accel.c: (viaSetupForScreenToScreenCopy),
124+ (viaSetupForSolidFill), (viaSetupForMono8x8PatternFill),
125+ (viaSetupForColor8x8PatternFill),
126+ (viaSetupForCPUToScreenColorExpandFill),
127+ (viaSubsequentScanlineCPUToScreenColorExpandFill),
128+ (viaSetupForImageWrite), (viaSubsequentImageWriteRect),
129+ (viaSetupForSolidLine), (viaSetupForDashedLine), (viaInitXAA):
130+
131+2010-05-04 Jon Nettleton <jon.nettleton@gmail.com>
132+
133+ Put timeouts on our while statements. These codepaths
134+ should be interrupted by a hardware state change, but
135+ if something goes wrong they loop forevere. Let's try
136+ and behave a little by putting a timeout on these loops.
137+
138+ * src/via_swov.c: (viaWaitHQVFlip), (viaWaitHQVFlipClear),
139+ (viaWaitHQVDone):
140+ * src/via_video.c: (Flip):
141+
142+2010-05-04 Jon Nettleton <jon.nettleton@gmail.com>
143+
144+ Add XVideo support for the VX855 Chipset.
145+ To support this chipset I have added HWDiff->HQVCmeRegs
146+ that allows handling differing register values, and
147+ HWDiff->dwNewScaleCtl which allows selection of a
148+ new Video scaling engine needed for the VX800/VX855
149+ chipsets.
150+
151+ * src/via.h:
152+ * src/via_bandwidth.c: (ViaSetSecondaryFIFO):
153+ * src/via_driver.h:
154+ * src/via_swov.c: (SaveVideoRegister), (VIAVidHWDiffInit),
155+ (viaOverlayHQVCalcZoomWidth), (viaOverlayHQVCalcZoomHeight),
156+ (ViaSwovSurfaceCreate), (SetHQVFetch), (Upd_Video):
157+ * src/via_swov.h:
158+
159+2010-04-21 Bartosz Kosiorek <gang65@poczta.onet.pl>
160+
161+ Replace RegionsEqual with REGION_EQUAL and use
162+ the xf86XVFillKeyHelperDrawable instead of xf86XVFillKeyHelper
163+
164+ * src/via_video.c: (viaReputImage), (viaPutImage):
165+
166+2010-03-07 Bartosz Kosiorek <gang65@poczta.onet.pl>
167+
168+ Fix segfaults with EXA and XV (Ticket #359)
169+ Tested on K8M890 and VN800
170+
171+ * src/via_video.c: (viaReputImage), (viaPutImage):
172+
173+2010-02-10 Bartosz Kosiorek <gang65@poczta.onet.pl>
174+
175+ Fix bug with suspend and VT switch on VX800 and 64bit systems
176+
177+ * src/via_driver.h:
178+ * src/via_video.c: (viaResetVideo), (viaSaveVideo),
179+ (viaRestoreVideo), (viaExitVideo):
180+ * src/via_video.h:
181+
182+2010-01-24 Bartosz Kosiorek <gang65@poczta.onet.pl>
183+
184+ Fix starting address restore and save (initial 64-bit support)
185+
186+ * src/via_crtc.c: (ViaFirstCRTCSetMode),
187+ (ViaFirstCRTCSetStartingAddress):
188+ * src/via_dri.c: (VIADRIAgpInit):
189+ * src/via_driver.c: (VIASave), (VIARestore):
190+ * src/via_driver.h:
191+
192+2009-12-04 Bartosz Kosiorek <gang65@poczta.onet.pl>
193+
194+ Enable new mode switch for VM800 chipsets
195+
196+ * src/via_driver.c: (VIASetupDefaultOptions):
197+
198+2009-11-21 Bartosz Kosiorek <gang65@poczta.onet.pl>
199+
200+ Add option to enable unaccelerated RandR rotation ("SWRandR").
201+ The accelerated option "HWRandR" is currently not implemented.
202+
203+ * man/openchrome.man:
204+ * src/via_driver.c: (VIAPreInit):
205+
206+2009-11-20 Bartosz Kosiorek <gang65@poczta.onet.pl>
207+
208+ Enabled new mode switch for PM800 chipset,
209+ to resolve many bugs with resolution detecting and changing
210+ (eg. switching to console)
211+
212+ * src/via_driver.c: (VIASetupDefaultOptions), (VIAPreInit):
213+
214+2009-11-07 Bartosz Kosiorek <gang65@poczta.onet.pl>
215+
216+ Add more comments to ViaSetSecondaryFIFO, add panel scale support for
217+ CLE266 and KM400, fix bug with malloc.
218+
219+ * src/via_bandwidth.c: (ViaSetSecondaryFIFO):
220+ * src/via_panel.c: (ViaPanelScale), (ViaPanelGetNativeDisplayMode):
221+
222 2009-09-26 Bartosz Kosiorek <gang65@poczta.onet.pl>
223
224 Save/restore ECK Clock Synthesizer
225Index: src/via_panel.c
226===================================================================
227--- a/src/via_panel.c (.../tags/release_0_2_904) (revision 916)
228+++ b/src/via_panel.c (.../trunk) (revision 916)
229@@ -45,17 +45,17 @@ static ViaPanelModeRec ViaPanelNativeModes[] = {
230 {1280, 768},
231 {1280, 1024},
232 {1400, 1050},
233- {1600, 1200}, /* 0x6 Resolution 1440x900 */
234+ {1440, 900}, /* 0x6 Resolution 1440x900 */
235 {1280, 800}, /* 0x7 Resolution 1280x800 (Samsung NC20) */
236 {800, 480}, /* 0x8 For Quanta 800x480 */
237 {1024, 600}, /* 0x9 Resolution 1024x600 (for HP 2133) */
238 {1366, 768}, /* 0xA Resolution 1366x768 */
239- {1920, 1080},
240- {1920, 1200},
241- {1280, 1024}, /* 0xD Need to be fixed to 1920x1200 */
242- {1440, 900}, /* 0xE Need to be fixed to 640x240 */
243- {1280, 720}, /* 0xF 480x640 */
244- {1200, 900}, /* 0x10 For Panasonic 1280x768 18bit Dual-Channel Panel */
245+ {1600, 1200}, /* 0xB Resolution 1600x1200 */
246+ {1680, 1050},
247+ {1920, 1200}, /* 0xD Resolution 1920x1200 */
248+ {640, 240}, /* 0xE Resolution 640x240 */
249+ {480, 640}, /* 0xF Resolution 480x640 */
250+ {1280, 768}, /* 0x10 For Panasonic 1280x768 18bit Dual-Channel Panel */
251 {1360, 768}, /* 0x11 Resolution 1360X768 */
252 {1024, 768}, /* 0x12 Resolution 1024x768 */
253 {800, 480} /* 0x13 General 8x4 panel use this setting */
254@@ -147,6 +147,9 @@ ViaPanelScaleDisable(ScrnInfoPtr pScrn)
255 vgaHWPtr hwp = VGAHWPTR(pScrn);
256
257 ViaCrtcMask(hwp, 0x79, 0x00, 0x01);
258+ /* Disable VX900 down scaling */
259+ if (pVia->Chipset == VIA_VX900)
260+ ViaCrtcMask(hwp, 0x89, 0x00, 0x01);
261 if (pVia->Chipset != VIA_CLE266 && pVia->Chipset != VIA_KM400)
262 ViaCrtcMask(hwp, 0xA2, 0x00, 0xC8);
263 }
264@@ -171,12 +174,18 @@ ViaPanelScale(ScrnInfoPtr pScrn, int resWidth, int
265 resWidth, resHeight, panelWidth, panelHeight));
266
267 if (resWidth < panelWidth) {
268- /* FIXME: It is different for chipset < K8M800 */
269- horScalingFactor = ((resWidth - 1) * 4096) / (panelWidth - 1);
270+ /* Load Horizontal Scaling Factor */
271+ if (pVia->Chipset != VIA_CLE266 && pVia->Chipset != VIA_KM400) {
272+ horScalingFactor = ((resWidth - 1) * 4096) / (panelWidth - 1);
273+
274+ /* Horizontal scaling enabled */
275+ cra2 = 0xC0;
276+ cr9f = horScalingFactor & 0x0003; /* HSCaleFactor[1:0] at CR9F[1:0] */
277+ } else {
278+ /* TODO: Need testing */
279+ horScalingFactor = ((resWidth - 1) * 1024) / (panelWidth - 1);
280+ }
281
282- /* Horizontal scaling enabled */
283- cra2 = 0xC0;
284- cr9f = horScalingFactor & 0x0003; /* HSCaleFactor[1:0] at CR9F[1:0] */
285 cr77 = (horScalingFactor & 0x03FC) >> 2; /* HSCaleFactor[9:2] at CR77[7:0] */
286 cr79 = (horScalingFactor & 0x0C00) >> 10; /* HSCaleFactor[11:10] at CR79[5:4] */
287 cr79 <<= 4;
288@@ -184,11 +193,18 @@ ViaPanelScale(ScrnInfoPtr pScrn, int resWidth, int
289 }
290
291 if (resHeight < panelHeight) {
292- verScalingFactor = ((resHeight - 1) * 2048) / (panelHeight - 1);
293+ /* Load Vertical Scaling Factor */
294+ if (pVia->Chipset != VIA_CLE266 && pVia->Chipset != VIA_KM400) {
295+ verScalingFactor = ((resHeight - 1) * 2048) / (panelHeight - 1);
296
297- /* Vertical scaling enabled */
298- cra2 |= 0x08;
299- cr79 |= ((verScalingFactor & 0x0001) << 3); /* VSCaleFactor[0] at CR79[3] */
300+ /* Vertical scaling enabled */
301+ cra2 |= 0x08;
302+ cr79 |= ((verScalingFactor & 0x0001) << 3); /* VSCaleFactor[0] at CR79[3] */
303+ } else {
304+ /* TODO: Need testing */
305+ verScalingFactor = ((resHeight - 1) * 1024) / (panelHeight - 1);
306+ }
307+
308 cr78 |= (verScalingFactor & 0x01FE) >> 1; /* VSCaleFactor[8:1] at CR78[7:0] */
309 cr79 |= ((verScalingFactor & 0x0600) >> 9) << 6; /* VSCaleFactor[10:9] at CR79[7:6] */
310 scaling = TRUE;
311@@ -203,13 +219,19 @@ ViaPanelScale(ScrnInfoPtr pScrn, int resWidth, int
312 ViaCrtcMask(hwp, 0x77, cr77, 0xFF);
313 ViaCrtcMask(hwp, 0x78, cr78, 0xFF);
314 ViaCrtcMask(hwp, 0x79, cr79, 0xF8);
315- ViaCrtcMask(hwp, 0x9F, cr9f, 0x03);
316+ if (pVia->Chipset != VIA_CLE266 && pVia->Chipset != VIA_KM400) {
317+ ViaCrtcMask(hwp, 0x9F, cr9f, 0x03);
318+ }
319 ViaCrtcMask(hwp, 0x79, 0x03, 0x03);
320- } else
321+ } else {
322+ /* Disable panel scale */
323 ViaCrtcMask(hwp, 0x79, 0x00, 0x01);
324+ }
325+
326+ if (pVia->Chipset != VIA_CLE266 && pVia->Chipset != VIA_KM400) {
327+ ViaCrtcMask(hwp, 0xA2, cra2, 0xC8);
328+ }
329
330- ViaCrtcMask(hwp, 0xA2, cra2, 0xC8);
331-
332 /* Horizontal scaling selection: interpolation */
333 // ViaCrtcMask(hwp, 0x79, 0x02, 0x02);
334 // else
335@@ -233,14 +255,14 @@ ViaPanelGetNativeDisplayMode(ScrnInfoPtr pScrn)
336
337 if (panelMode->Width && panelMode->Height) {
338
339- /* TODO: fix refresh rate and check malloc */
340+ /* TODO: fix refresh rate */
341 DisplayModePtr p = malloc( sizeof(DisplayModeRec) ) ;
342- memset(p, 0, sizeof(DisplayModeRec));
343+ if (p) {
344+ memset(p, 0, sizeof(DisplayModeRec));
345
346- float refresh = 60.0f ;
347+ float refresh = 60.0f ;
348
349- /* The following code is borrowed from xf86SetModeCrtc. */
350- if (p) {
351+ /* The following code is borrowed from xf86SetModeCrtc. */
352 viaTimingCvt(p, panelMode->Width, panelMode->Height, refresh, FALSE, TRUE);
353 p->CrtcHDisplay = p->HDisplay;
354 p->CrtcHSyncStart = p->HSyncStart;
355@@ -256,9 +278,13 @@ ViaPanelGetNativeDisplayMode(ScrnInfoPtr pScrn)
356 p->CrtcVBlankEnd = max(p->CrtcVSyncEnd, p->CrtcVTotal);
357 p->CrtcHBlankStart = min(p->CrtcHSyncStart, p->CrtcHDisplay);
358 p->CrtcHBlankEnd = max(p->CrtcHSyncEnd, p->CrtcHTotal);
359-
360+
361+ pVia->pBIOSInfo->Panel->NativeDisplayMode = p;
362+ } else {
363+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
364+ "Out of memory. Size: %d bytes\n", sizeof(DisplayModeRec));
365 }
366- pVia->pBIOSInfo->Panel->NativeDisplayMode = p;
367+
368 } else {
369 xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
370 "Invalid panel dimension (%dx%d)\n", panelMode->Width,
371@@ -282,10 +308,7 @@ ViaPanelPreInit(ScrnInfoPtr pScrn)
372 Bool ret;
373
374 ret = ViaPanelGetSizeFromDDCv1(pScrn, &width, &height);
375-/*
376- if (!ret)
377- ret = ViaPanelGetSizeFromDDCv2(pScrn, &width);
378-*/
379+
380 if (ret) {
381 panel->NativeModeIndex = ViaPanelLookUpModeIndex(width, height);
382 DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaPanelLookUpModeIndex, Width %d, Height %d, NativeModeIndex%d\n", width, height, panel->NativeModeIndex));
383@@ -333,28 +356,28 @@ ViaPanelCenterMode(DisplayModePtr centerMode, Disp
384
385
386 /*
387- * Try to interprete EDID ourselves.
388+ * Try to interpret EDID ourselves.
389 */
390 Bool
391 ViaPanelGetSizeFromEDID(ScrnInfoPtr pScrn, xf86MonPtr pMon,
392 int *width, int *height)
393 {
394- int i, max = 0, vsize;
395+ int i, max_hsize = 0, vsize = 0;
396
397 DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAGetPanelSizeFromEDID\n"));
398
399 /* !!! Why are we not checking VESA modes? */
400
401 /* checking standard timings */
402- for (i = 0; i < 8; i++)
403+ for (i = 0; i < STD_TIMINGS; i++)
404 if ((pMon->timings2[i].hsize > 256)
405- && (pMon->timings2[i].hsize > max)) {
406- max = pMon->timings2[i].hsize;
407+ && (pMon->timings2[i].hsize > max_hsize)) {
408+ max_hsize = pMon->timings2[i].hsize;
409 vsize = pMon->timings2[i].vsize;
410 }
411
412- if (max != 0) {
413- *width = max;
414+ if (max_hsize != 0) {
415+ *width = max_hsize;
416 *height = vsize;
417 return TRUE;
418 }
419@@ -369,14 +392,14 @@ ViaPanelGetSizeFromEDID(ScrnInfoPtr pScrn, xf86Mon
420 struct detailed_timings timing = pMon->det_mon[i].section.d_timings;
421
422 /* ignore v_active for now */
423- if ((timing.clock > 15000000) && (timing.h_active > max)) {
424- max = timing.h_active;
425+ if ((timing.clock > 15000000) && (timing.h_active > max_hsize)) {
426+ max_hsize = timing.h_active;
427 vsize = timing.v_active;
428 }
429 }
430
431- if (max != 0) {
432- *width = max;
433+ if (max_hsize != 0) {
434+ *width = max_hsize;
435 *height = vsize;
436 return TRUE;
437 }
438@@ -386,7 +409,6 @@ ViaPanelGetSizeFromEDID(ScrnInfoPtr pScrn, xf86Mon
439
440 Bool
441 ViaPanelGetSizeFromDDCv1(ScrnInfoPtr pScrn, int *width, int *height)
442-
443 {
444 VIAPtr pVia = VIAPTR(pScrn);
445 xf86MonPtr pMon;
446@@ -396,7 +418,7 @@ ViaPanelGetSizeFromDDCv1(ScrnInfoPtr pScrn, int *w
447 if (!xf86I2CProbeAddress(pVia->pI2CBus2, 0xA0))
448 return FALSE;
449
450- pMon = xf86DoEDID_DDC2(pScrn->scrnIndex, pVia->pI2CBus2);
451+ pMon = xf86DoEEDID(pScrn->scrnIndex, pVia->pI2CBus2, TRUE);
452 if (!pMon)
453 return FALSE;
454
455Index: src/via_id.h
456===================================================================
457--- a/src/via_id.h (.../tags/release_0_2_904) (revision 916)
458+++ b/src/via_id.h (.../trunk) (revision 916)
459@@ -39,6 +39,7 @@ enum VIACHIPTAGS {
460 VIA_P4M890,
461 VIA_VX800,
462 VIA_VX855,
463+ VIA_VX900,
464 VIA_LAST
465 };
466
467@@ -56,6 +57,7 @@ enum VIACHIPTAGS {
468 #define PCI_CHIP_VT3327 0x3343 /* P4M890 */
469 #define PCI_CHIP_VT3353 0x1122 /* VX800 */
470 #define PCI_CHIP_VT3409 0x5122 /* VX855/VX875 */
471+#define PCI_CHIP_VT3410 0x7122 /* VX900 */
472
473 /* There is some conflicting information about the two major revisions of
474 * the CLE266, often labelled Ax and Cx. The dividing line seems to be
475Index: src/via_video.c
476===================================================================
477--- a/src/via_video.c (.../tags/release_0_2_904) (revision 916)
478+++ b/src/via_video.c (.../trunk) (revision 916)
479@@ -354,6 +354,14 @@ DecideOverlaySupport(ScrnInfoPtr pScrn)
480 mClock = 333;
481 memEfficiency = (float)SINGLE_3205_133;
482 break;
483+ case VIA_MEM_DDR800:
484+ mClock = 400;
485+ memEfficiency = (float)SINGLE_3205_133;
486+ break;
487+ case VIA_MEM_DDR1066:
488+ mClock = 533;
489+ memEfficiency = (float)SINGLE_3205_133;
490+ break;
491 default:
492 /*Unknow DRAM Type */
493 DBG_DD(ErrorF("Unknow DRAM Type!\n"));
494@@ -426,7 +434,7 @@ DecideOverlaySupport(ScrnInfoPtr pScrn)
495 DBG_DD(ErrorF(" via_video.c : totalBandwidth= %f : \n",
496 totalBandWidth));
497 if (needBandWidth < totalBandWidth)
498- return TRUE;
499+ return TRUE;
500 }
501 return FALSE;
502 }
503@@ -466,8 +474,8 @@ viaResetVideo(ScrnInfoPtr pScrn)
504
505 viaVidEng->video1_ctl = 0;
506 viaVidEng->video3_ctl = 0;
507- viaVidEng->compose = 0x80000000;
508- viaVidEng->compose = 0x40000000;
509+ viaVidEng->compose = V1_COMMAND_FIRE;
510+ viaVidEng->compose = V3_COMMAND_FIRE;
511 viaVidEng->color_key = 0x821;
512 viaVidEng->snd_color_key = 0x821;
513
514@@ -479,16 +487,16 @@ viaSaveVideo(ScrnInfoPtr pScrn)
515 VIAPtr pVia = VIAPTR(pScrn);
516 vmmtr viaVidEng = (vmmtr) pVia->VidMapBase;
517
518+ DBG_DD(ErrorF(" via_video.c : viaSaveVideo : \n"));
519 /* Save video registers */
520- /* TODO: Identify which registers should be saved and restored */
521 memcpy(pVia->VideoRegs, (void*)viaVidEng, sizeof(video_via_regs));
522
523 pVia->dwV1 = ((vmmtr) viaVidEng)->video1_ctl;
524 pVia->dwV3 = ((vmmtr) viaVidEng)->video3_ctl;
525 viaVidEng->video1_ctl = 0;
526 viaVidEng->video3_ctl = 0;
527- viaVidEng->compose = 0x80000000;
528- viaVidEng->compose = 0x40000000;
529+ viaVidEng->compose = V1_COMMAND_FIRE;
530+ viaVidEng->compose = V3_COMMAND_FIRE;
531 }
532
533 void
534@@ -496,16 +504,66 @@ viaRestoreVideo(ScrnInfoPtr pScrn)
535 {
536 VIAPtr pVia = VIAPTR(pScrn);
537 vmmtr viaVidEng = (vmmtr) pVia->VidMapBase;
538+ video_via_regs *localVidEng = pVia->VideoRegs;
539+
540
541+ DBG_DD(ErrorF(" via_video.c : viaRestoreVideo : \n"));
542 /* Restore video registers */
543- /* TODO: Identify which registers should be saved and restored */
544- memcpy((void*)viaVidEng, pVia->VideoRegs, sizeof(video_via_regs));
545+ /* flush restored video engines' setting to VidMapBase */
546+
547+ viaVidEng->alphawin_hvstart = localVidEng->alphawin_hvstart;
548+ viaVidEng->alphawin_size = localVidEng->alphawin_size;
549+ viaVidEng->alphawin_ctl = localVidEng->alphawin_ctl;
550+ viaVidEng->alphafb_stride = localVidEng->alphafb_stride;
551+ viaVidEng->color_key = localVidEng->color_key;
552+ viaVidEng->alphafb_addr = localVidEng->alphafb_addr;
553+ viaVidEng->chroma_low = localVidEng->chroma_low;
554+ viaVidEng->chroma_up = localVidEng->chroma_up;
555+ viaVidEng->interruptflag = localVidEng->interruptflag;
556
557+ if (pVia->ChipId != PCI_CHIP_VT3314)
558+ {
559+ /*VT3314 only has V3*/
560+ viaVidEng->video1_ctl = localVidEng->video1_ctl;
561+ viaVidEng->video1_fetch = localVidEng->video1_fetch;
562+ viaVidEng->video1y_addr1 = localVidEng->video1y_addr1;
563+ viaVidEng->video1_stride = localVidEng->video1_stride;
564+ viaVidEng->video1_hvstart = localVidEng->video1_hvstart;
565+ viaVidEng->video1_size = localVidEng->video1_size;
566+ viaVidEng->video1y_addr2 = localVidEng->video1y_addr2;
567+ viaVidEng->video1_zoom = localVidEng->video1_zoom;
568+ viaVidEng->video1_mictl = localVidEng->video1_mictl;
569+ viaVidEng->video1y_addr0 = localVidEng->video1y_addr0;
570+ viaVidEng->video1_fifo = localVidEng->video1_fifo;
571+ viaVidEng->video1y_addr3 = localVidEng->video1y_addr3;
572+ viaVidEng->v1_source_w_h = localVidEng->v1_source_w_h ;
573+ viaVidEng->video1_CSC1 = localVidEng->video1_CSC1;
574+ viaVidEng->video1_CSC2 = localVidEng->video1_CSC2;
575+ }
576+ viaVidEng->snd_color_key = localVidEng->snd_color_key;
577+ viaVidEng->v3alpha_prefifo = localVidEng->v3alpha_prefifo;
578+ viaVidEng->v3alpha_fifo = localVidEng->v3alpha_fifo;
579+ viaVidEng->video3_CSC2 = localVidEng->video3_CSC2;
580+ viaVidEng->video3_CSC2 = localVidEng->video3_CSC2;
581+ viaVidEng->v3_source_width = localVidEng->v3_source_width;
582+ viaVidEng->video3_ctl = localVidEng->video3_ctl;
583+ viaVidEng->video3_addr0 = localVidEng->video3_addr0;
584+ viaVidEng->video3_addr1 = localVidEng->video3_addr1;
585+ viaVidEng->video3_stride = localVidEng->video3_stride;
586+ viaVidEng->video3_hvstart = localVidEng->video3_hvstart;
587+ viaVidEng->video3_size = localVidEng->video3_size;
588+ viaVidEng->v3alpha_fetch = localVidEng->v3alpha_fetch;
589+ viaVidEng->video3_zoom = localVidEng->video3_zoom;
590+ viaVidEng->video3_mictl = localVidEng->video3_mictl;
591+ viaVidEng->video3_CSC1 = localVidEng->video3_CSC1;
592+ viaVidEng->video3_CSC2 = localVidEng->video3_CSC2;
593+ viaVidEng->compose = localVidEng->compose;
594+
595 viaVidEng->video1_ctl = pVia->dwV1;
596 viaVidEng->video3_ctl = pVia->dwV3;
597- viaVidEng->compose = 0x80000000;
598- viaVidEng->compose = 0x40000000;
599-
600+ if (pVia->ChipId != PCI_CHIP_VT3314)
601+ viaVidEng->compose = V1_COMMAND_FIRE;
602+ viaVidEng->compose = V3_COMMAND_FIRE;
603 }
604
605 void
606@@ -524,8 +582,8 @@ viaExitVideo(ScrnInfoPtr pScrn)
607
608 viaVidEng->video1_ctl = 0;
609 viaVidEng->video3_ctl = 0;
610- viaVidEng->compose = 0x80000000;
611- viaVidEng->compose = 0x40000000;
612+ viaVidEng->compose = V1_COMMAND_FIRE;
613+ viaVidEng->compose = V3_COMMAND_FIRE;
614
615 /*
616 * Free all adaptor info allocated in viaInitVideo.
617@@ -542,15 +600,15 @@ viaExitVideo(ScrnInfoPtr pScrn)
618 (viaPortPrivPtr) curAdapt->pPortPrivates->ptr + j,
619 TRUE);
620 }
621- xfree(curAdapt->pPortPrivates->ptr);
622+ free(curAdapt->pPortPrivates->ptr);
623 }
624- xfree(curAdapt->pPortPrivates);
625+ free(curAdapt->pPortPrivates);
626 }
627- xfree(curAdapt);
628+ free(curAdapt);
629 }
630 }
631 if (allAdaptors)
632- xfree(allAdaptors);
633+ free(allAdaptors);
634 }
635
636 void
637@@ -561,7 +619,7 @@ viaInitVideo(ScreenPtr pScreen)
638 XF86VideoAdaptorPtr *adaptors, *newAdaptors;
639 int num_adaptors, num_new;
640
641- DBG_DD(ErrorF(" via_video.c : viaInitVideo : \n"));
642+ DBG_DD(ErrorF(" via_video.c : viaInitVideo, Screen[%d]\n", pScrn->scrnIndex));
643
644 allAdaptors = NULL;
645 newAdaptors = NULL;
646@@ -611,7 +669,7 @@ viaInitVideo(ScreenPtr pScreen)
647
648 DBG_DD(ErrorF(" via_video.c : num_adaptors : %d\n", num_adaptors));
649 if (newAdaptors) {
650- allAdaptors = xalloc((num_adaptors + num_new) *
651+ allAdaptors = malloc((num_adaptors + num_new) *
652 sizeof(XF86VideoAdaptorPtr *));
653 if (allAdaptors) {
654 if (num_adaptors)
655@@ -636,134 +694,7 @@ viaInitVideo(ScreenPtr pScreen)
656 }
657 }
658
659-static Bool
660-RegionsEqual(RegionPtr A, RegionPtr B)
661-{
662- int *dataA, *dataB;
663- int num;
664
665- num = REGION_NUM_RECTS(A);
666- if (num != REGION_NUM_RECTS(B))
667- return FALSE;
668-
669- if ((A->extents.x1 != B->extents.x1) ||
670- (A->extents.x2 != B->extents.x2) ||
671- (A->extents.y1 != B->extents.y1) || (A->extents.y2 != B->extents.y2))
672- return FALSE;
673-
674- dataA = (int *)REGION_RECTS(A);
675- dataB = (int *)REGION_RECTS(B);
676-
677- while (num--) {
678- if ((dataA[0] != dataB[0]) || (dataA[1] != dataB[1]))
679- return FALSE;
680- dataA += 2;
681- dataB += 2;
682- }
683-
684- return TRUE;
685-}
686-
687-static void
688-viaVideoFillPixmap(ScrnInfoPtr pScrn,
689- char *base,
690- unsigned long pitch,
691- int depth,
692- int x, int y, int w, int h,
693- unsigned long color)
694-{
695- int i;
696-
697- ErrorF("pitch %lu, depth %d, x %d, y %d, w %d, h %d, color 0x%08lx\n",
698- pitch, depth, x, y, w, h, color);
699-
700- depth = (depth + 7) >> 3;
701-
702- base += y*pitch + x*depth;
703-
704- switch(depth) {
705- case 4:
706- while(h--) {
707- register CARD32 *p = (CARD32 *)base;
708- for (i=0; i<w; ++i) {
709- *p++ = color;
710- }
711- base += pitch;
712- }
713- break;
714- case 2: {
715- register CARD16 col = color & 0x0000FFFF;
716- while(h--) {
717- register CARD16 *p = (CARD16 *)base;
718- for (i=0; i<w; ++i) {
719- *p++ = col;
720- }
721- base += pitch;
722- }
723- break;
724- }
725- case 1: {
726- register CARD8 col = color & 0xFF;
727- while(h--) {
728- register CARD8 *p = (CARD8 *)base;
729- for (i=0; i<w; ++i) {
730- *p++ = col;
731- }
732- base += pitch;
733- }
734- break;
735- }
736- default:
737- break;
738- }
739-}
740-
741-
742-
743-static int
744-viaPaintColorkey(ScrnInfoPtr pScrn, viaPortPrivPtr pPriv, RegionPtr clipBoxes,
745- DrawablePtr pDraw)
746-{
747-
748- if (pDraw->type == DRAWABLE_WINDOW) {
749-
750- VIAPtr pVia = VIAPTR(pScrn);
751- PixmapPtr pPix = (pScrn->pScreen->GetWindowPixmap)((WindowPtr) pDraw);
752- unsigned long pitch = pPix->devKind;
753- long offset = (long) pPix->devPrivate.ptr - (long) pVia->FBBase;
754- int x,y;
755- BoxPtr pBox;
756- int nBox;
757-
758- REGION_TRANSLATE(pScrn->pScreen, clipBoxes, - pPix->screen_x,
759- - pPix->screen_y);
760-
761- nBox = REGION_NUM_RECTS(clipBoxes);
762- pBox = REGION_RECTS(clipBoxes);
763-
764- while(nBox--) {
765- if (pVia->NoAccel || offset < 0 ||
766- offset > pScrn->videoRam*1024) {
767- viaVideoFillPixmap(pScrn, pPix->devPrivate.ptr, pitch,
768- pDraw->bitsPerPixel, pBox->x1, pBox->y1,
769- pBox->x2 - pBox->x1, pBox->y2 - pBox->y1,
770- pPriv->colorKey);
771- } else {
772- viaAccelFillPixmap(pScrn, offset, pitch,
773- pDraw->bitsPerPixel, pBox->x1, pBox->y1,
774- pBox->x2 - pBox->x1, pBox->y2 - pBox->y1,
775- pPriv->colorKey);
776- }
777- pBox++;
778- }
779-
780- DamageDamageRegion(pPix, clipBoxes);
781- }
782-
783- return 0;
784-}
785-
786-
787 /*
788 * This one gets called, for example, on panning.
789 */
790@@ -779,14 +710,19 @@ viaReputImage(ScrnInfoPtr pScrn,
791 viaPortPrivPtr pPriv = (viaPortPrivPtr) data;
792 VIAPtr pVia = VIAPTR(pScrn);
793
794- if (!RegionsEqual(&pPriv->clip, clipBoxes)) {
795+ if (!REGION_EQUAL(pScrn->pScreen, &pPriv->clip, clipBoxes)) {
796 REGION_COPY(pScrn->pScreen, &pPriv->clip, clipBoxes);
797 if (pPriv->autoPaint) {
798 if (pDraw->type == DRAWABLE_WINDOW) {
799- viaPaintColorkey(pScrn, pPriv, clipBoxes, pDraw);
800+ /* TODO Replace xf86XVFillKeyHelper with xf86XVFillKeyHelperDrawable
801+ Currently resizing problem exist in VLC Media Player
802+ Example of implementation:
803+ xf86XVFillKeyHelperDrawable(pDraw, pPriv->colorKey, clipBoxes);
804+ DamageDamageRegion(pDraw, clipBoxes); */
805+
806+ xf86XVFillKeyHelper(pScrn->pScreen, pPriv->colorKey, clipBoxes);
807 } else {
808- xf86XVFillKeyHelper(pScrn->pScreen, pPriv->colorKey,
809- clipBoxes);
810+ xf86XVFillKeyHelper(pScrn->pScreen, pPriv->colorKey, clipBoxes);
811 }
812 }
813 }
814@@ -832,7 +768,7 @@ viaSetupAdaptors(ScreenPtr pScreen, XF86VideoAdapt
815 DevUnion *pdevUnion;
816 int i, j, usedPorts, numPorts;
817
818- DBG_DD(ErrorF(" via_video.c : viaSetupImageVideo: \n"));
819+ DBG_DD(ErrorF(" via_video.c : viaSetupAdaptors (viaSetupImageVideo): \n"));
820
821 xvBrightness = MAKE_ATOM("XV_BRIGHTNESS");
822 xvContrast = MAKE_ATOM("XV_CONTRAST");
823@@ -931,7 +867,7 @@ viaStopVideo(ScrnInfoPtr pScrn, pointer data, Bool
824 if (exit) {
825 ViaSwovSurfaceDestroy(pScrn, pPriv);
826 if (pPriv->dmaBounceBuffer)
827- xfree(pPriv->dmaBounceBuffer);
828+ free(pPriv->dmaBounceBuffer);
829 pPriv->dmaBounceBuffer = 0;
830 pPriv->dmaBounceStride = 0;
831 pPriv->dmaBounceLines = 0;
832@@ -1042,6 +978,8 @@ viaGetPortAttribute(ScrnInfoPtr pScrn,
833 }
834
835 } else {
836+ DBG_DD(ErrorF(" via_video.c : viaGetPortAttribute : is not supported the attribute\n"));
837+
838 /*return BadMatch */;
839 }
840 return Success;
841@@ -1070,6 +1008,7 @@ Flip(VIAPtr pVia, viaPortPrivPtr pPriv, int fourcc
842 unsigned long DisplayBufferIndex)
843 {
844 unsigned long proReg = 0;
845+ unsigned count = 50000;
846
847 if (pVia->ChipId == PCI_CHIP_VT3259
848 && !(pVia->swov.gdwVideoFlagSW & VIDEO_1_INUSE))
849@@ -1081,7 +1020,8 @@ Flip(VIAPtr pVia, viaPortPrivPtr pPriv, int fourcc
850 case FOURCC_RV15:
851 case FOURCC_RV16:
852 case FOURCC_RV32:
853- while ((VIDInD(HQV_CONTROL + proReg) & HQV_SW_FLIP));
854+ while ((VIDInD(HQV_CONTROL + proReg) & HQV_SW_FLIP)
855+ && --count);
856 VIDOutD(HQV_SRC_STARTADDR_Y + proReg,
857 pVia->swov.SWDevice.dwSWPhysicalAddr[DisplayBufferIndex]);
858 VIDOutD(HQV_CONTROL + proReg,
859@@ -1090,7 +1030,8 @@ Flip(VIAPtr pVia, viaPortPrivPtr pPriv, int fourcc
860 break;
861 case FOURCC_YV12:
862 default:
863- while ((VIDInD(HQV_CONTROL + proReg) & HQV_SW_FLIP));
864+ while ((VIDInD(HQV_CONTROL + proReg) & HQV_SW_FLIP)
865+ && --count);
866 VIDOutD(HQV_SRC_STARTADDR_Y + proReg,
867 pVia->swov.SWDevice.dwSWPhysicalAddr[DisplayBufferIndex]);
868 if (pVia->VideoEngine == VIDEO_ENGINE_CME) {
869@@ -1174,7 +1115,7 @@ viaDmaBlitImage(VIAPtr pVia,
870 pPort->dmaBounceStride != bounceStride ||
871 pPort->dmaBounceLines != bounceLines) {
872 if (pPort->dmaBounceBuffer) {
873- xfree(pPort->dmaBounceBuffer);
874+ free(pPort->dmaBounceBuffer);
875 pPort->dmaBounceBuffer = 0;
876 }
877 size = bounceStride * bounceLines + 16;
878@@ -1296,7 +1237,7 @@ viaPutImage(ScrnInfoPtr pScrn,
879 unsigned long retCode;
880
881 # ifdef XV_DEBUG
882- ErrorF(" via_video.c : viaPutImage : called\n");
883+ ErrorF(" via_video.c : viaPutImage : called, Screen[%d]\n", pScrn->scrnIndex);
884 ErrorF(" via_video.c : FourCC=0x%x width=%d height=%d sync=%d\n", id,
885 width, height, sync);
886 ErrorF
887@@ -1405,12 +1346,11 @@ viaPutImage(ScrnInfoPtr pScrn,
888
889 lpUpdateOverlay->dwFlags = DDOVER_KEYDEST;
890
891- if (pScrn->bitsPerPixel == 8)
892- lpUpdateOverlay->dwColorSpaceLowValue =
893- pPriv->colorKey & 0xff;
894- else
895- lpUpdateOverlay->dwColorSpaceLowValue = pPriv->colorKey;
896-
897+ if (pScrn->bitsPerPixel == 8) {
898+ lpUpdateOverlay->dwColorSpaceLowValue = pPriv->colorKey & 0xff;
899+ } else {
900+ lpUpdateOverlay->dwColorSpaceLowValue = pPriv->colorKey;
901+ }
902 /* If use extend FIFO mode */
903 if (pScrn->currentMode->HDisplay > 1024) {
904 dwUseExtendedFIFO = 1;
905@@ -1436,7 +1376,8 @@ viaPutImage(ScrnInfoPtr pScrn,
906 && (pPriv->old_src_w == src_w) && (pPriv->old_src_h == src_h)
907 && (pVia->old_dwUseExtendedFIFO == dwUseExtendedFIFO)
908 && (pVia->VideoStatus & VIDEO_SWOV_ON) &&
909- RegionsEqual(&pPriv->clip, clipBoxes)) {
910+ REGION_EQUAL(pScrn->pScreen, &pPriv->clip, clipBoxes)) {
911+ DBG_DD(ErrorF(" via_video.c : don't do UpdateOverlay! \n"));
912 viaXvError(pScrn, pPriv, xve_none);
913 return Success;
914 }
915@@ -1454,16 +1395,18 @@ viaPutImage(ScrnInfoPtr pScrn,
916 pVia->VideoStatus |= VIDEO_SWOV_ON;
917
918 /* BitBlt: Draw the colorkey rectangle */
919- if (!RegionsEqual(&pPriv->clip, clipBoxes)) {
920+ if (!REGION_EQUAL(pScrn->pScreen, &pPriv->clip, clipBoxes)) {
921 REGION_COPY(pScrn->pScreen, &pPriv->clip, clipBoxes);
922 if (pPriv->autoPaint) {
923 if (pDraw->type == DRAWABLE_WINDOW) {
924- viaPaintColorkey(pScrn, pPriv, clipBoxes, pDraw);
925+ xf86XVFillKeyHelperDrawable(pDraw, pPriv->colorKey, clipBoxes);
926+ DamageDamageRegion(pDraw, clipBoxes);
927 } else {
928- xf86XVFillKeyHelper(pScrn->pScreen, pPriv->colorKey,
929- clipBoxes);
930+ xf86XVFillKeyHelper(pScrn->pScreen, pPriv->colorKey, clipBoxes);
931 }
932 }
933+ } else {
934+ DBG_DD(ErrorF(" via_video.c : // No need to draw Colorkey!! \n"));
935 }
936 /*
937 * Update video overlay
938@@ -1498,6 +1441,7 @@ viaQueryImageAttributes(ScrnInfoPtr pScrn,
939
940 DBG_DD(ErrorF(" via_video.c : viaQueryImageAttributes : FourCC=0x%x, ",
941 id));
942+ DBG_DD(ErrorF(" via_video.c : Screen[%d], w=%d, h=%d\n", pScrn->scrnIndex, *w, *h));
943
944 if ((!w) || (!h))
945 return 0;
946Index: src/via_lvds.c
947===================================================================
948--- a/src/via_lvds.c (.../tags/release_0_2_904) (revision 916)
949+++ b/src/via_lvds.c (.../trunk) (revision 916)
950@@ -42,7 +42,7 @@
951 2^13 X 0.0698uSec [1/14.318MHz] = 8192 X 0.0698uSec =572.1uSec
952 Timer = Counter x 572 uSec
953 2. Note:
954- 0.0698 uSec is too small to compute for hardware. So we multify a
955+ 0.0698 uSec is too small to compute for hardware. So we multiply a
956 reference value(2^13) to make it big enough to compute for hardware.
957 3. Note:
958 The meaning of the TD0~TD3 are count of the clock.
959Index: src/via_video.h
960===================================================================
961--- a/src/via_video.h (.../tags/release_0_2_904) (revision 916)
962+++ b/src/via_video.h (.../trunk) (revision 916)
963@@ -44,6 +44,10 @@
964
965 #define VIDEO_BPP 2
966
967+
968+#define V1_COMMAND_FIRE 0x80000000 /* V1 commands fire */
969+#define V3_COMMAND_FIRE 0x40000000 /* V3 commands fire */
970+
971 typedef struct
972 {
973 CARD32 interruptflag; /* 200 */
974@@ -89,7 +93,7 @@ typedef struct
975 CARD32 video3_ctl; /* 2a0 */
976 CARD32 video3_addr0; /* 2a4 */
977 CARD32 video3_addr1; /* 2a8 */
978- CARD32 video3_stribe; /* 2ac */
979+ CARD32 video3_stride; /* 2ac */
980 CARD32 video3_hvstart; /* 2b0 */
981 CARD32 video3_size; /* 2b4 */
982 CARD32 v3alpha_fetch; /* 2b8 */
983Index: src/via_mode.c
984===================================================================
985--- a/src/via_mode.c (.../tags/release_0_2_904) (revision 916)
986+++ b/src/via_mode.c (.../trunk) (revision 916)
987@@ -308,11 +308,14 @@ ViaDFPDetect(ScrnInfoPtr pScrn)
988 xf86MonPtr monPtr = NULL;
989
990 if (pVia->pI2CBus2)
991- monPtr = xf86DoEDID_DDC2(pScrn->scrnIndex, pVia->pI2CBus2);
992+ monPtr = xf86DoEEDID(pScrn->scrnIndex, pVia->pI2CBus2, TRUE);
993
994 if (monPtr) {
995 xf86PrintEDID(monPtr);
996 xf86SetDDCproperties(pScrn, monPtr);
997+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
998+ "DDC pI2CBus2 detected a %s\n", DIGITAL(monPtr->features.input_type) ?
999+ "DFP" : "CRT"));
1000 return TRUE;
1001 } else {
1002 return FALSE;
1003@@ -380,6 +383,7 @@ ViaOutputsDetect(ScrnInfoPtr pScrn)
1004 case VIA_CX700:
1005 case VIA_VX800:
1006 case VIA_VX855:
1007+ case VIA_VX900:
1008 if (ViaDFPDetect(pScrn)) {
1009 pBIOSInfo->DfpPresent = TRUE;
1010 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
1011@@ -514,6 +518,7 @@ ViaOutputsSelect(ScrnInfoPtr pScrn)
1012 case VIA_CX700:
1013 case VIA_VX800:
1014 case VIA_VX855:
1015+ case VIA_VX900:
1016 pVia->pBIOSInfo->Lvds->IsActive = TRUE ;
1017 break;
1018 }
1019@@ -859,6 +864,9 @@ ViaGetMemoryBandwidth(ScrnInfoPtr pScrn)
1020 case VIA_MEM_DDR533:
1021 case VIA_MEM_DDR667:
1022 return VIA_BW_DDR667;
1023+ case VIA_MEM_DDR800:
1024+ case VIA_MEM_DDR1066:
1025+ return VIA_BW_DDR1066;
1026 default:
1027 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1028 "ViaBandwidthAllowed: Unknown memory type: %d\n", pVia->MemClk);
1029@@ -999,8 +1007,8 @@ ViaSetDotclock(ScrnInfoPtr pScrn, CARD32 clock, in
1030 dn = pll.params.dn;
1031 dm = pll.params.dm;
1032
1033- /* The VX855 does not modify dm/dn, but earlier chipsets do. */
1034- if (pVia->Chipset != VIA_VX855) {
1035+ /* The VX855 and VX900 do not modify dm/dn, but earlier chipsets do. */
1036+ if ((pVia->Chipset != VIA_VX855) && (pVia->Chipset != VIA_VX900)) {
1037 dm -= 2;
1038 dn -= 2;
1039 }
1040@@ -1078,7 +1086,7 @@ VIASetLCDMode(ScrnInfoPtr pScrn, DisplayModePtr mo
1041 pBIOSInfo->Clock = Table.InitTb.LCDClk_12Bit;
1042 else {
1043 pBIOSInfo->Clock = Table.InitTb.VClk_12Bit;
1044- /* for some reason still to be defined this is neccessary */
1045+ /* for some reason still to be defined this is necessary */
1046 ViaSetSecondaryDotclock(pScrn, Table.InitTb.LCDClk_12Bit);
1047 }
1048 } else {
1049@@ -1708,7 +1716,7 @@ ViaModeSet(ScrnInfoPtr pScrn, DisplayModePtr mode)
1050 ViaModeSecondCRTC(pScrn, mode);
1051 ViaSecondDisplayChannelEnable(pScrn);
1052 }
1053-
1054+
1055 if (pBIOSInfo->FirstCRTC->IsActive) {
1056 if (pBIOSInfo->CrtActive) {
1057 /* CRT on FirstCRTC */
1058@@ -1734,6 +1742,15 @@ ViaModeSet(ScrnInfoPtr pScrn, DisplayModePtr mode)
1059 ViaDisplayDisableCRT(pScrn);
1060 }
1061
1062+ // Enable panel support on VM800, K8M800 and VX900 chipset
1063+ // See: https://bugs.launchpad.net/openchrome/+bug/186103
1064+ if (pBIOSInfo->Panel->IsActive &&
1065+ ((pVia->Chipset == VIA_VM800) ||
1066+ (pVia->Chipset == VIA_K8M800) ||
1067+ (pVia->Chipset == VIA_VX900) )) {
1068+ pBIOSInfo->FirstCRTC->IsActive=TRUE;
1069+ ViaModeFirstCRTC(pScrn, mode);
1070+ }
1071 if (pBIOSInfo->Simultaneous->IsActive) {
1072 ViaDisplayEnableSimultaneous(pScrn);
1073 } else {
1074Index: src/via_mode.h
1075===================================================================
1076--- a/src/via_mode.h (.../tags/release_0_2_904) (revision 916)
1077+++ b/src/via_mode.h (.../trunk) (revision 916)
1078@@ -32,8 +32,9 @@
1079 */
1080 #define VIA_BW_MIN 74000000 /* > 640x480@60Hz@32bpp */
1081 #define VIA_BW_DDR200 394000000
1082-#define VIA_BW_DDR400 498000000 /* > 1920x1080@60Hz@32bpp */
1083+#define VIA_BW_DDR400 553000000 /* > 1920x1200@60Hz@32bpp */
1084 #define VIA_BW_DDR667 922000000
1085+#define VIA_BW_DDR1066 922000000
1086
1087 union pllparams {
1088 struct {
1089@@ -54,50 +55,50 @@ static struct ViaDotClock {
1090 CARD16 UniChrome;
1091 union pllparams UniChromePro;
1092 } ViaDotClocks[] = {
1093- { 25200, 0x513C, /* 0xa79004 */ { 1, 4, 6, 169 } },
1094- { 25312, 0xC763, /* 0xc49005 */ { 1, 4, 7, 198 } },
1095- { 26591, 0x471A, /* 0xce9005 */ { 1, 4, 7, 208 } },
1096- { 31500, 0xC558, /* 0xae9003 */ { 1, 4, 5, 176 } },
1097- { 31704, 0x471F, /* 0xaf9002 */ { 1, 4, 4, 177 } },
1098- { 32663, 0xC449, /* 0x479000 */ { 1, 4, 2, 73 } },
1099- { 33750, 0x4721, /* 0x959002 */ { 1, 4, 4, 151 } },
1100- { 35500, 0x5877, /* 0x759001 */ { 1, 4, 3, 119 } },
1101- { 36000, 0x5879, /* 0x9f9002 */ { 1, 4, 4, 161 } },
1102- { 39822, 0xC459, /* 0x578c02 */ { 1, 3, 4, 89 } },
1103- { 40000, 0x515F, /* 0x848c04 */ { 1, 3, 6, 134 } },
1104- { 41164, 0x4417, /* 0x2c8c00 */ { 1, 3, 2, 46 } },
1105- { 46981, 0x5069, /* 0x678c02 */ { 1, 3, 4, 105 } },
1106- { 49500, 0xC353, /* 0xa48c04 */ { 3, 3, 5, 138 } },
1107- { 50000, 0xC354, /* 0x368c00 */ { 1, 3, 2, 56 } },
1108- { 56300, 0x4F76, /* 0x3d8c00 */ { 1, 3, 2, 63 } },
1109- { 57275, 0, /* 0x3e8c00 */ { 1, 3, 5, 157 } }, /* For XO 1.5 no need for a unichrome clock */
1110- { 57284, 0x4E70, /* 0x3e8c00 */ { 1, 3, 2, 64 } },
1111- { 64995, 0x0D3B, /* 0x6b8c01 */ { 1, 3, 3, 109 } },
1112- { 65000, 0x0D3B, /* 0x6b8c01 */ { 1, 3, 3, 109 } }, /* Slightly unstable on PM800 */
1113- { 65028, 0x866D, /* 0x6b8c01 */ { 1, 3, 3, 109 } },
1114- { 74480, 0x156E, /* 0x288800 */ { 1, 2, 2, 42 } },
1115- { 75000, 0x156E, /* 0x288800 */ { 1, 2, 2, 42 } },
1116- { 78800, 0x442C, /* 0x2a8800 */ { 1, 2, 2, 44 } },
1117- { 81135, 0x0622, /* 0x428801 */ { 1, 2, 3, 68 } },
1118- { 81613, 0x4539, /* 0x708803 */ { 1, 2, 5, 114 } },
1119- { 94500, 0x4542, /* 0x4d8801 */ { 1, 2, 3, 79 } },
1120- { 108000, 0x0B53, /* 0x778802 */ { 1, 2, 4, 121 } },
1121- { 108280, 0x4879, /* 0x778802 */ { 1, 2, 4, 121 } },
1122- { 122000, 0x0D6F, /* 0x428800 */ { 1, 2, 2, 68 } },
1123- { 122726, 0x073C, /* 0x878802 */ { 1, 2, 4, 137 } },
1124- { 135000, 0x0742, /* 0x6f8801 */ { 1, 2, 3, 113 } },
1125- { 148500, 0x0853, /* 0x518800 */ { 1, 2, 2, 83 } },
1126- { 155800, 0x0857, /* 0x558402 */ { 1, 1, 4, 87 } },
1127- { 157500, 0x422C, /* 0x2a8400 */ { 1, 1, 2, 44 } },
1128- { 161793, 0x4571, /* 0x6f8403 */ { 1, 1, 5, 113 } },
1129- { 162000, 0x0A71, /* 0x6f8403 */ { 1, 1, 5, 113 } },
1130- { 175500, 0x4231, /* 0x2f8400 */ { 1, 1, 2, 49 } },
1131- { 189000, 0x0542, /* 0x4d8401 */ { 1, 1, 3, 79 } },
1132- { 202500, 0x0763, /* 0x6F8402 */ { 1, 1, 4, 113 } },
1133- { 204800, 0x0764, /* 0x548401 */ { 1, 1, 3, 86 } },
1134- { 218300, 0x043D, /* 0x3b8400 */ { 1, 1, 2, 61 } },
1135- { 229500, 0x0660, /* 0x3e8400 */ { 1, 1, 2, 64 } }, /* Not tested on Pro } */
1136- { 0, 0, { 0, 0, 0, 0 } }
1137+ { 25200, 0x513C, /* 0xa79004 */ { { 1, 4, 6, 169 } } },
1138+ { 25312, 0xC763, /* 0xc49005 */ { { 1, 4, 7, 198 } } },
1139+ { 26591, 0x471A, /* 0xce9005 */ { { 1, 4, 7, 208 } } },
1140+ { 31500, 0xC558, /* 0xae9003 */ { { 1, 4, 5, 176 } } },
1141+ { 31704, 0x471F, /* 0xaf9002 */ { { 1, 4, 4, 177 } } },
1142+ { 32663, 0xC449, /* 0x479000 */ { { 1, 4, 2, 73 } } },
1143+ { 33750, 0x4721, /* 0x959002 */ { { 1, 4, 4, 151 } } },
1144+ { 35500, 0x5877, /* 0x759001 */ { { 1, 4, 3, 119 } } },
1145+ { 36000, 0x5879, /* 0x9f9002 */ { { 1, 4, 4, 161 } } },
1146+ { 39822, 0xC459, /* 0x578c02 */ { { 1, 3, 4, 89 } } },
1147+ { 40000, 0x515F, /* 0x848c04 */ { { 1, 3, 6, 134 } } },
1148+ { 41164, 0x4417, /* 0x2c8c00 */ { { 1, 3, 2, 46 } } },
1149+ { 46981, 0x5069, /* 0x678c02 */ { { 1, 3, 4, 105 } } },
1150+ { 49500, 0xC353, /* 0xa48c04 */ { { 3, 3, 5, 138 } } },
1151+ { 50000, 0xC354, /* 0x368c00 */ { { 1, 3, 2, 56 } } },
1152+ { 56300, 0x4F76, /* 0x3d8c00 */ { { 1, 3, 2, 63 } } },
1153+ { 57275, 0, /* 0x3e8c00 */ { { 1, 3, 5, 157 } } }, /* For XO 1.5 no need for a unichrome clock */
1154+ { 57284, 0x4E70, /* 0x3e8c00 */ { { 1, 3, 2, 64 } } },
1155+ { 64995, 0x0D3B, /* 0x6b8c01 */ { { 1, 3, 3, 109 } } },
1156+ { 65000, 0x0D3B, /* 0x6b8c01 */ { { 1, 3, 3, 109 } } }, /* Slightly unstable on PM800 */
1157+ { 65028, 0x866D, /* 0x6b8c01 */ { { 1, 3, 3, 109 } } },
1158+ { 74480, 0x156E, /* 0x288800 */ { { 1, 2, 2, 42 } } },
1159+ { 75000, 0x156E, /* 0x288800 */ { { 1, 2, 2, 42 } } },
1160+ { 78800, 0x442C, /* 0x2a8800 */ { { 1, 2, 2, 44 } } },
1161+ { 81135, 0x0622, /* 0x428801 */ { { 1, 2, 3, 68 } } },
1162+ { 81613, 0x4539, /* 0x708803 */ { { 1, 2, 5, 114 } } },
1163+ { 94500, 0x4542, /* 0x4d8801 */ { { 1, 2, 3, 79 } } },
1164+ { 108000, 0x0B53, /* 0x778802 */ { { 1, 2, 4, 121 } } },
1165+ { 108280, 0x4879, /* 0x778802 */ { { 1, 2, 4, 121 } } },
1166+ { 122000, 0x0D6F, /* 0x428800 */ { { 1, 2, 2, 68 } } },
1167+ { 122726, 0x073C, /* 0x878802 */ { { 1, 2, 4, 137 } } },
1168+ { 135000, 0x0742, /* 0x6f8801 */ { { 1, 2, 3, 113 } } },
1169+ { 148500, 0x0853, /* 0x518800 */ { { 1, 2, 2, 83 } } },
1170+ { 155800, 0x0857, /* 0x558402 */ { { 1, 1, 4, 87 } } },
1171+ { 157500, 0x422C, /* 0x2a8400 */ { { 1, 1, 2, 44 } } },
1172+ { 161793, 0x4571, /* 0x6f8403 */ { { 1, 1, 5, 113 } } },
1173+ { 162000, 0x0A71, /* 0x6f8403 */ { { 1, 1, 5, 113 } } },
1174+ { 175500, 0x4231, /* 0x2f8400 */ { { 1, 1, 2, 49 } } },
1175+ { 189000, 0x0542, /* 0x4d8401 */ { { 1, 1, 3, 79 } } },
1176+ { 202500, 0x0763, /* 0x6F8402 */ { { 1, 1, 4, 113 } } },
1177+ { 204800, 0x0764, /* 0x548401 */ { { 1, 1, 3, 86 } } },
1178+ { 218300, 0x043D, /* 0x3b8400 */ { { 1, 1, 2, 61 } } },
1179+ { 229500, 0x0660, /* 0x3e8400 */ { { 1, 1, 2, 64 } } }, /* Not tested on Pro } */
1180+ { 0, 0, { { 0, 0, 0, 0 } } }
1181 };
1182
1183 /*
1184@@ -131,7 +132,7 @@ static DisplayModeRec ViaPanelModes[] = {
1185 { MODEPREFIX("856x480"), 31704, 856, 872, 960, 1064, 0, 480, 480, 483, 497, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX },
1186 { MODEPREFIX("1024x512"), 41164, 1024, 1056, 1160, 1296, 0, 512, 512, 515, 531, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX },
1187 { MODEPREFIX("1024x576"), 46981, 1024, 1064, 1168, 1312, 0, 576, 576, 579, 597, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX },
1188- { MODEPREFIX("1024x600"), 48960, 1024, 1064, 1168, 1312, 0, 600, 601, 604, 622, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX },
1189+ { MODEPREFIX("1024x600"), 48960, 1024, 1048, 1152, 1312, 0, 600, 601, 604, 630, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX },
1190 { MODEPREFIX("1024x768"), 65028, 1024, 1048, 1184, 1344, 0, 768, 770, 776, 806, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX },
1191 { MODEPREFIX("1152x864"), 81613, 1152, 1216, 1336, 1520, 0, 864, 864, 867, 895, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX },
1192 { MODEPREFIX("1280x768"), 81135, 1280, 1328, 1440, 1688, 0, 768, 770, 776, 802, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX },
1193Index: src/via_memcpy.c
1194===================================================================
1195--- a/src/via_memcpy.c (.../tags/release_0_2_904) (revision 916)
1196+++ b/src/via_memcpy.c (.../trunk) (revision 916)
1197@@ -581,12 +581,12 @@ viaVidCopyInit(char *copyType, ScreenPtr pScreen)
1198
1199 if (VIAAllocLinear(&tmpFbBuffer, pScrn, alignSize + 31))
1200 return libc_YUV42X;
1201- if (NULL == (buf2 = (unsigned char *)xalloc(testSize))) {
1202+ if (NULL == (buf2 = (unsigned char *)malloc(testSize))) {
1203 VIAFreeLinear(&tmpFbBuffer);
1204 return libc_YUV42X;
1205 }
1206- if (NULL == (buf3 = (unsigned char *)xalloc(testSize))) {
1207- xfree(buf2);
1208+ if (NULL == (buf3 = (unsigned char *)malloc(testSize))) {
1209+ free(buf2);
1210 VIAFreeLinear(&tmpFbBuffer);
1211 return libc_YUV42X;
1212 }
1213@@ -642,8 +642,8 @@ viaVidCopyInit(char *copyType, ScreenPtr pScreen)
1214 curData->mName);
1215 }
1216 }
1217- xfree(buf3);
1218- xfree(buf2);
1219+ free(buf3);
1220+ free(buf2);
1221 VIAFreeLinear(&tmpFbBuffer);
1222 xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
1223 "Using %s YUV42X copy for %s.\n",
1224Index: src/via_driver.c
1225===================================================================
1226--- a/src/via_driver.c (.../tags/release_0_2_904) (revision 916)
1227+++ b/src/via_driver.c (.../trunk) (revision 916)
1228@@ -143,6 +143,7 @@ static const struct pci_id_match via_device_match[
1229 VIA_DEVICE_MATCH (PCI_CHIP_VT3327, 0 ),
1230 VIA_DEVICE_MATCH (PCI_CHIP_VT3353, 0 ),
1231 VIA_DEVICE_MATCH (PCI_CHIP_VT3409, 0 ),
1232+ VIA_DEVICE_MATCH (PCI_CHIP_VT3410, 0 ),
1233 { 0, 0, 0 },
1234 };
1235
1236@@ -174,12 +175,13 @@ static SymTabRec VIAChipsets[] = {
1237 {VIA_K8M800, "K8M800/K8N800"},
1238 {VIA_PM800, "PM800/PM880/CN400"},
1239 {VIA_VM800, "VM800/P4M800Pro/VN800/CN700"},
1240+ {VIA_CX700, "CX700/VX700"},
1241 {VIA_K8M890, "K8M890/K8N890"},
1242+ {VIA_P4M890, "P4M890"},
1243 {VIA_P4M900, "P4M900/VN896/CN896"},
1244- {VIA_CX700, "CX700/VX700"},
1245- {VIA_P4M890, "P4M890"},
1246- {VIA_VX800, "VX800"},
1247- {VIA_VX855, "VX855"},
1248+ {VIA_VX800, "VX800/VX820"},
1249+ {VIA_VX855, "VX855/VX875"},
1250+ {VIA_VX900, "VX900"},
1251 {-1, NULL }
1252 };
1253
1254@@ -190,12 +192,13 @@ static PciChipsets VIAPciChipsets[] = {
1255 {VIA_K8M800, PCI_CHIP_VT3204, VIA_RES_SHARED},
1256 {VIA_PM800, PCI_CHIP_VT3259, VIA_RES_SHARED},
1257 {VIA_VM800, PCI_CHIP_VT3314, VIA_RES_SHARED},
1258+ {VIA_CX700, PCI_CHIP_VT3324, VIA_RES_SHARED},
1259 {VIA_K8M890, PCI_CHIP_VT3336, VIA_RES_SHARED},
1260+ {VIA_P4M890, PCI_CHIP_VT3327, VIA_RES_SHARED},
1261 {VIA_P4M900, PCI_CHIP_VT3364, VIA_RES_SHARED},
1262- {VIA_CX700, PCI_CHIP_VT3324, VIA_RES_SHARED},
1263- {VIA_P4M890, PCI_CHIP_VT3327, VIA_RES_SHARED},
1264 {VIA_VX800, PCI_CHIP_VT3353, VIA_RES_SHARED},
1265 {VIA_VX855, PCI_CHIP_VT3409, VIA_RES_SHARED},
1266+ {VIA_VX900, PCI_CHIP_VT3410, VIA_RES_SHARED},
1267 {-1, -1, VIA_RES_UNDEF}
1268 };
1269
1270@@ -215,9 +218,11 @@ typedef enum
1271 OPTION_EXA_SCRATCH_SIZE,
1272 OPTION_SWCURSOR,
1273 OPTION_SHADOW_FB,
1274+ OPTION_ROTATION_TYPE,
1275 OPTION_ROTATE,
1276 OPTION_VIDEORAM,
1277 OPTION_ACTIVEDEVICE,
1278+ OPTION_I2CDEVICES,
1279 OPTION_BUSWIDTH,
1280 OPTION_CENTER,
1281 OPTION_PANELSIZE,
1282@@ -253,6 +258,7 @@ static OptionInfoRec VIAOptions[] = {
1283 {OPTION_EXA_SCRATCH_SIZE, "ExaScratchSize", OPTV_INTEGER, {0}, FALSE},
1284 {OPTION_SWCURSOR, "SWCursor", OPTV_BOOLEAN, {0}, FALSE},
1285 {OPTION_SHADOW_FB, "ShadowFB", OPTV_BOOLEAN, {0}, FALSE},
1286+ {OPTION_ROTATION_TYPE, "RotationType", OPTV_ANYSTR, {0}, FALSE},
1287 {OPTION_ROTATE, "Rotate", OPTV_ANYSTR, {0}, FALSE},
1288 {OPTION_VIDEORAM, "VideoRAM", OPTV_INTEGER, {0}, FALSE},
1289 {OPTION_ACTIVEDEVICE, "ActiveDevice", OPTV_ANYSTR, {0}, FALSE},
1290@@ -276,6 +282,7 @@ static OptionInfoRec VIAOptions[] = {
1291 {OPTION_MODE_SWITCH_METHOD, "ModeSwitchMethod", OPTV_ANYSTR, {0}, FALSE},
1292 {OPTION_MAX_DRIMEM, "MaxDRIMem", OPTV_INTEGER, {0}, FALSE},
1293 {OPTION_AGPMEM, "AGPMem", OPTV_INTEGER, {0}, FALSE},
1294+ {OPTION_I2CDEVICES, "I2CDevices", OPTV_ANYSTR, {0}, FALSE},
1295 {-1, NULL, OPTV_NONE, {0}, FALSE}
1296 };
1297
1298@@ -307,6 +314,7 @@ VIASetup(pointer module, pointer opts, int *errmaj
1299 {
1300 static Bool setupDone = FALSE;
1301
1302+ /* Only be loaded once */
1303 if (!setupDone) {
1304 setupDone = TRUE;
1305 xf86AddDriver(&VIA, module,
1306@@ -339,6 +347,7 @@ VIAGetRec(ScrnInfoPtr pScrn)
1307 if (pScrn->driverPrivate)
1308 return TRUE;
1309
1310+ /* allocate VIARec */
1311 pScrn->driverPrivate = xnfcalloc(sizeof(VIARec), 1);
1312 VIAPtr pVia = ((VIARec *) (pScrn->driverPrivate));
1313
1314@@ -400,36 +409,36 @@ VIAFreeRec(ScrnInfoPtr pScrn)
1315
1316 if (pBIOSInfo->Panel) {
1317 if (pBIOSInfo->Panel->NativeMode)
1318- xfree(pBIOSInfo->Panel->NativeMode);
1319+ free(pBIOSInfo->Panel->NativeMode);
1320 if (pBIOSInfo->Panel->CenteredMode)
1321- xfree(pBIOSInfo->Panel->CenteredMode);
1322- xfree(pBIOSInfo->Panel);
1323+ free(pBIOSInfo->Panel->CenteredMode);
1324+ free(pBIOSInfo->Panel);
1325 }
1326
1327 if (pBIOSInfo->FirstCRTC)
1328- xfree(pBIOSInfo->FirstCRTC);
1329+ free(pBIOSInfo->FirstCRTC);
1330 if (pBIOSInfo->SecondCRTC)
1331- xfree(pBIOSInfo->SecondCRTC);
1332+ free(pBIOSInfo->SecondCRTC);
1333 if (pBIOSInfo->Simultaneous)
1334- xfree(pBIOSInfo->Simultaneous);
1335+ free(pBIOSInfo->Simultaneous);
1336 if (pBIOSInfo->Lvds)
1337- xfree(pBIOSInfo->Lvds);
1338+ free(pBIOSInfo->Lvds);
1339 }
1340
1341 if (VIAPTR(pScrn)->pVbe)
1342 vbeFree(VIAPTR(pScrn)->pVbe);
1343
1344 if (pVia->VideoRegs)
1345- xfree(pVia->VideoRegs);
1346+ free(pVia->VideoRegs);
1347
1348 if (((VIARec *) (pScrn->driverPrivate))->pBIOSInfo->TVI2CDev)
1349 xf86DestroyI2CDevRec((((VIARec *) (pScrn->driverPrivate))->pBIOSInfo->
1350 TVI2CDev), TRUE);
1351- xfree(((VIARec *) (pScrn->driverPrivate))->pBIOSInfo);
1352+ free(((VIARec *) (pScrn->driverPrivate))->pBIOSInfo);
1353
1354 VIAUnmapMem(pScrn);
1355
1356- xfree(pScrn->driverPrivate);
1357+ free(pScrn->driverPrivate);
1358 pScrn->driverPrivate = NULL;
1359 } /* VIAFreeRec */
1360
1361@@ -455,7 +464,6 @@ via_pci_probe(DriverPtr driver, int entity_num,
1362 {
1363 ScrnInfoPtr scrn = NULL;
1364 EntityInfoPtr entity;
1365- DevUnion *private;
1366
1367 scrn = xf86ConfigPciEntity(scrn, 0, entity_num, VIAPciChipsets,
1368 NULL, NULL, NULL, NULL, NULL);
1369@@ -513,7 +521,7 @@ VIAProbe(DriverPtr drv, int flags)
1370 numDevSections,
1371 drv,
1372 &usedChips);
1373- xfree(devSections);
1374+ free(devSections);
1375
1376 if (numUsed <= 0)
1377 return FALSE;
1378@@ -588,11 +596,11 @@ VIAProbe(DriverPtr drv, int flags)
1379 }
1380 instance++;
1381 }
1382- xfree(pEnt);
1383+ free(pEnt);
1384 }
1385 }
1386
1387- xfree(usedChips);
1388+ free(usedChips);
1389
1390 return foundScreen;
1391
1392@@ -652,6 +660,12 @@ VIAProbeDDC(ScrnInfoPtr pScrn, int index)
1393 vbeInfoPtr pVbe;
1394
1395 if (xf86LoadSubModule(pScrn, "vbe")) {
1396+ /* FIXME This line should be replaced with:
1397+
1398+ pVbe = VBEExtendedInit(NULL, index, 0);
1399+
1400+ for XF86 version > 4.2.99
1401+ */
1402 pVbe = VBEInit(NULL, index);
1403 ConfiguredMonitor = vbeDoEDID(pVbe, NULL);
1404 vbeFree(pVbe);
1405@@ -664,7 +678,7 @@ VIASetupDefaultOptions(ScrnInfoPtr pScrn)
1406 VIAPtr pVia = VIAPTR(pScrn);
1407 VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo;
1408
1409- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIASetupDefaultOptions\n"));
1410+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIASetupDefaultOptions - Setting up default chipset options.\n"));
1411
1412 pVia->shadowFB = FALSE;
1413 pVia->NoAccel = FALSE;
1414@@ -684,10 +698,14 @@ VIASetupDefaultOptions(ScrnInfoPtr pScrn)
1415 pVia->maxDriSize = 0;
1416 pVia->agpMem = AGP_SIZE / 1024;
1417 pVia->ActiveDevice = 0x00;
1418+ pVia->I2CDevices = 0x00;
1419 pVia->VideoEngine = VIDEO_ENGINE_CLE;
1420 #ifdef HAVE_DEBUG
1421 pVia->PrintVGARegs = FALSE;
1422 #endif
1423+
1424+ /* Disable vertical interpolation because the size of */
1425+ /* line buffer (limited to 800) is too small to do interpolation. */
1426 pVia->swov.maxWInterp = 800;
1427 pVia->swov.maxHInterp = 600;
1428 pVia->useLegacyVBE = TRUE;
1429@@ -710,20 +728,30 @@ VIASetupDefaultOptions(ScrnInfoPtr pScrn)
1430 break;
1431 case VIA_K8M800:
1432 pVia->DRIIrqEnable = FALSE;
1433- pVia->UseLegacyModeSwitch = TRUE;
1434 break;
1435 case VIA_PM800:
1436+ /* Use new mode switch to resolve many resolution and display bugs (switch to console) */
1437+ /* FIXME The video playing (XV) is not working correctly after turn on new mode switch */
1438 pVia->VideoEngine = VIDEO_ENGINE_CME;
1439- pVia->UseLegacyModeSwitch = TRUE;
1440 break;
1441 case VIA_VM800:
1442- pVia->UseLegacyModeSwitch = TRUE;
1443+ /* New mode switch resolve bug with gamma set #282 */
1444+ /* and with Xv after hibernate #240 */
1445 break;
1446+ case VIA_CX700:
1447+ pVia->VideoEngine = VIDEO_ENGINE_CME;
1448+ pVia->swov.maxWInterp = 1920;
1449+ pVia->swov.maxHInterp = 1080;
1450+ break;
1451 case VIA_K8M890:
1452 pVia->VideoEngine = VIDEO_ENGINE_CME;
1453 pVia->agpEnable = FALSE;
1454 pVia->dmaXV = FALSE;
1455 break;
1456+ case VIA_P4M890:
1457+ pVia->VideoEngine = VIDEO_ENGINE_CME;
1458+ pVia->dmaXV = FALSE;
1459+ break;
1460 case VIA_P4M900:
1461 pVia->VideoEngine = VIDEO_ENGINE_CME;
1462 pVia->agpEnable = FALSE;
1463@@ -732,20 +760,13 @@ VIASetupDefaultOptions(ScrnInfoPtr pScrn)
1464 pVia->dmaXV = FALSE;
1465 pBIOSInfo->TVDIPort = VIA_DI_PORT_DVP0;
1466 break;
1467- case VIA_CX700:
1468- pVia->VideoEngine = VIDEO_ENGINE_CME;
1469- pVia->swov.maxWInterp = 1920;
1470- pVia->swov.maxHInterp = 1080;
1471- break;
1472- case VIA_P4M890:
1473- pVia->VideoEngine = VIDEO_ENGINE_CME;
1474- pVia->dmaXV = FALSE;
1475- break;
1476+
1477 case VIA_VX800:
1478 case VIA_VX855:
1479+ case VIA_VX900:
1480 pVia->VideoEngine = VIDEO_ENGINE_CME;
1481- /* pVia->agpEnable = FALSE;
1482- pVia->dmaXV = FALSE;*/
1483+ pVia->agpEnable = FALSE;
1484+ pVia->dmaXV = FALSE;
1485 break;
1486 }
1487
1488@@ -807,7 +828,7 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
1489 pEnt = xf86GetEntityInfo(pScrn->entityList[0]);
1490 #ifndef XSERVER_LIBPCIACCESS
1491 if (pEnt->resources) {
1492- xfree(pEnt);
1493+ free(pEnt);
1494 VIAFreeRec(pScrn);
1495 return FALSE;
1496 }
1497@@ -825,7 +846,7 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
1498 pPriv = xf86GetEntityPrivate(pScrn->entityList[0], gVIAEntityIndex);
1499 pVIAEnt = pPriv->ptr;
1500 if (pVIAEnt->BypassSecondary) {
1501- xfree(pEnt);
1502+ free(pEnt);
1503 VIAFreeRec(pScrn);
1504 return FALSE;
1505 }
1506@@ -848,6 +869,7 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
1507 pVIAEnt->HasSecondary = FALSE;
1508 pVIAEnt->RestorePrimary = FALSE;
1509 pVIAEnt->IsSecondaryRestored = FALSE;
1510+
1511 }
1512 } else {
1513 pVia->sharedData = xnfcalloc(sizeof(ViaSharedRec), 1);
1514@@ -866,7 +888,7 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
1515 */
1516
1517 if (!xf86SetDepthBpp(pScrn, 0, 0, 0, Support32bppFb)) {
1518- xfree(pEnt);
1519+ free(pEnt);
1520 VIAFreeRec(pScrn);
1521 return FALSE;
1522 } else {
1523@@ -881,7 +903,7 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
1524 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1525 "Given depth (%d) is not supported by this driver\n",
1526 pScrn->depth);
1527- xfree(pEnt);
1528+ free(pEnt);
1529 VIAFreeRec(pScrn);
1530 return FALSE;
1531 }
1532@@ -897,7 +919,7 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
1533 rgb zeros = { 0, 0, 0 };
1534
1535 if (!xf86SetWeight(pScrn, zeros, zeros)) {
1536- xfree(pEnt);
1537+ free(pEnt);
1538 VIAFreeRec(pScrn);
1539 return FALSE;
1540 } else {
1541@@ -914,7 +936,7 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
1542 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Given default visual"
1543 " (%s) is not supported at depth %d.\n",
1544 xf86GetVisualName(pScrn->defaultVisual), pScrn->depth);
1545- xfree(pEnt);
1546+ free(pEnt);
1547 VIAFreeRec(pScrn);
1548 return FALSE;
1549 }
1550@@ -979,7 +1001,7 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
1551
1552 xf86DrvMsg(pScrn->scrnIndex, from, "Chipset revision: %d\n", pVia->ChipRev);
1553
1554- xfree(pEnt);
1555+ free(pEnt);
1556
1557 /* Detect the amount of installed RAM */
1558 from = X_PROBED;
1559@@ -993,6 +1015,12 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
1560
1561 switch (pVia->Chipset) {
1562 case VIA_CLE266:
1563+#ifdef XSERVER_LIBPCIACCESS
1564+ pci_device_cfg_read_u8(bridge, &videoRam, 0xE1);
1565+#else
1566+ videoRam = pciReadByte(pciTag(0, 0, 0), 0xE1) & 0x70;
1567+#endif
1568+ pScrn->videoRam = (1 << ((videoRam & 0x70) >> 4)) << 10;
1569 case VIA_KM400:
1570 #ifdef XSERVER_LIBPCIACCESS
1571 pci_device_cfg_read_u8(bridge, &videoRam, 0xE1);
1572@@ -1000,6 +1028,12 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
1573 videoRam = pciReadByte(pciTag(0, 0, 0), 0xE1) & 0x70;
1574 #endif
1575 pScrn->videoRam = (1 << ((videoRam & 0x70) >> 4)) << 10;
1576+ /* Workaround for #177 (VRAM probing fail on P4M800) */
1577+ if (pScrn->videoRam < 16384) {
1578+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
1579+ "Memory size detection failed: using 16 MB.\n");
1580+ pScrn->videoRam = 16 << 10;
1581+ }
1582 break;
1583 case VIA_PM800:
1584 case VIA_VM800:
1585@@ -1017,6 +1051,7 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
1586 case VIA_CX700:
1587 case VIA_VX800:
1588 case VIA_VX855:
1589+ case VIA_VX900:
1590 #ifdef XSERVER_LIBPCIACCESS
1591 pci_device_cfg_read_u8(vgaDevice, &videoRam, 0xA1);
1592 #else
1593@@ -1046,23 +1081,18 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
1594 }
1595 }
1596
1597- if (from == X_PROBED)
1598+ if (from == X_PROBED) {
1599 xf86DrvMsg(pScrn->scrnIndex, from,
1600 "Probed amount of VideoRAM = %d kB\n", pScrn->videoRam);
1601+ }
1602
1603- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
1604- "Setting up default chipset options.\n");
1605 if (!VIASetupDefaultOptions(pScrn)) {
1606 VIAFreeRec(pScrn);
1607 return FALSE;
1608 }
1609
1610- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Reading config file...\n");
1611 xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, VIAOptions);
1612
1613- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
1614- "Starting to parse config file options...\n");
1615-
1616 if (xf86GetOptValInteger(VIAOptions, OPTION_VIDEORAM, &pScrn->videoRam))
1617 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
1618 "Setting amount of VideoRAM to %d kB\n", pScrn->videoRam);
1619@@ -1100,6 +1130,31 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
1620 }
1621
1622 /* When rotating, switch shadow framebuffer on and acceleration off. */
1623+ if ((s = xf86GetOptValString(VIAOptions, OPTION_ROTATION_TYPE))) {
1624+ if (!xf86NameCmp(s, "SWRandR")) {
1625+ pVia->shadowFB = TRUE;
1626+ pVia->NoAccel = TRUE;
1627+ pVia->RandRRotation = TRUE;
1628+ pVia->rotate = RR_Rotate_0;
1629+ xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Rotating screen "
1630+ "RandR enabled, acceleration disabled\n");
1631+ } else if (!xf86NameCmp(s, "HWRandR")) {
1632+ pVia->shadowFB = TRUE;
1633+ pVia->NoAccel = TRUE;
1634+ pVia->RandRRotation = TRUE;
1635+ pVia->rotate = RR_Rotate_0;
1636+ xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Hardware accelerated "
1637+ "rotating screen is not implemented. Using SW RandR.\n");
1638+ } else {
1639+ xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "\"%s\" is not a valid"
1640+ "value for Option \"RotationType\".\n", s);
1641+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
1642+ "Valid options are \"SWRandR\" and \"HWRandR\".\n");
1643+ }
1644+ }
1645+
1646+
1647+ /* When rotating, switch shadow framebuffer on and acceleration off. */
1648 if ((s = xf86GetOptValString(VIAOptions, OPTION_ROTATE))) {
1649 if (!xf86NameCmp(s, "CW")) {
1650 pVia->shadowFB = TRUE;
1651@@ -1498,6 +1553,7 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
1652 }
1653 }
1654
1655+ /* Initialize the colormap */
1656 Gamma zeros = { 0.0, 0.0, 0.0 };
1657 if (!xf86SetGamma(pScrn, zeros)) {
1658 VIAFreeRec(pScrn);
1659@@ -1523,6 +1579,17 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
1660
1661 pVia->videoRambytes = pScrn->videoRam << 10;
1662
1663+ /* I2CDevices Option for I2C Initialization */
1664+ //pVia->I2CDevices = 0x00;
1665+ if ((s = xf86GetOptValString(VIAOptions, OPTION_I2CDEVICES))) {
1666+ if (strstr(s, "Bus1"))
1667+ pVia->I2CDevices |= VIA_I2C_BUS1;
1668+ if (strstr(s, "Bus2"))
1669+ pVia->I2CDevices |= VIA_I2C_BUS2;
1670+ if (strstr(s, "Bus3"))
1671+ pVia->I2CDevices |= VIA_I2C_BUS3;
1672+ }
1673+
1674 if (!xf86LoadSubModule(pScrn, "i2c")) {
1675 VIAFreeRec(pScrn);
1676 return FALSE;
1677@@ -1536,10 +1603,13 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
1678 } else {
1679
1680 if (pVia->pI2CBus1) {
1681- pVia->DDC1 = xf86DoEDID_DDC2(pScrn->scrnIndex, pVia->pI2CBus1);
1682+ pVia->DDC1 = xf86DoEEDID(pScrn->scrnIndex, pVia->pI2CBus1, TRUE);
1683 if (pVia->DDC1) {
1684 xf86PrintEDID(pVia->DDC1);
1685 xf86SetDDCproperties(pScrn, pVia->DDC1);
1686+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
1687+ "DDC pI2CBus1 detected a %s\n", DIGITAL(pVia->DDC1->features.input_type) ?
1688+ "DFP" : "CRT"));
1689 }
1690 }
1691 }
1692@@ -1559,17 +1629,6 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
1693 ViaPanelPreInit(pScrn);
1694 }
1695
1696- if (pBIOSInfo->Panel->IsActive &&
1697- ((pVia->Chipset == VIA_K8M800) ||
1698- (pVia->Chipset == VIA_PM800) ||
1699- (pVia->Chipset == VIA_VM800))) {
1700- xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Panel on K8M800, PM800 and "
1701- "VM800 is currently not supported.\n");
1702- xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
1703- "Using VBE to set modes to work around this.\n");
1704- pVia->useVBEModes = TRUE;
1705- }
1706-
1707 pVia->pVbe = NULL;
1708 if (pVia->useVBEModes) {
1709 /* VBE doesn't properly initialise int10 itself. */
1710@@ -1593,6 +1652,7 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
1711 }
1712
1713 } else {
1714+ int max_pitch, max_height;
1715 /* Add own modes. */
1716 ViaModesAttach(pScrn, pScrn->monitor);
1717
1718@@ -1609,6 +1669,26 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
1719 clockRanges->interlaceAllowed = TRUE;
1720 clockRanges->doubleScanAllowed = FALSE;
1721
1722+ switch (pVia->Chipset) {
1723+ case VIA_CLE266:
1724+ case VIA_KM400:
1725+ case VIA_K8M800:
1726+ case VIA_PM800:
1727+ case VIA_VM800:
1728+ max_pitch = 3344;
1729+ max_height = 2508;
1730+ case VIA_CX700:
1731+ case VIA_K8M890:
1732+ case VIA_P4M890:
1733+ case VIA_P4M900:
1734+ max_pitch = 8192/(pScrn->bitsPerPixel >> 3)-1;
1735+ max_height = max_pitch;
1736+ break;
1737+ default:
1738+ max_pitch = 16384/(pScrn->bitsPerPixel >> 3)-1;
1739+ max_height = max_pitch;
1740+ }
1741+
1742 /*
1743 * xf86ValidateModes will check that the mode HTotal and VTotal values
1744 * don't exceed the chipset's limit if pScrn->maxHValue and
1745@@ -1621,7 +1701,7 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
1746 *
1747 * CLE266A: primary AdjustFrame can use only 24 bits, so we are limited
1748 * to 12x11 bits; 4080x2048 (~2:1), 3344x2508 (4:3), or 2896x2896 (1:1).
1749- * Test CLE266Cx, KM400, KM400A, K8M800, PM800, CN400 please.
1750+ * TODO Test CLE266Cx, KM400, KM400A, K8M800, CN400 please.
1751 *
1752 * We should be able to limit the memory available for a mode to 32 MB,
1753 * but xf86ValidateModes (or miScanLineWidth) fails to catch this
1754@@ -1629,15 +1709,16 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
1755 */
1756
1757 /* Select valid modes from those available. */
1758- i = xf86ValidateModes(pScrn, pScrn->monitor->Modes, /* availModes */
1759- pScrn->display->modes, /* modeNames */
1760- clockRanges, /* list of clock ranges */
1761+ i = xf86ValidateModes(pScrn,
1762+ pScrn->monitor->Modes, /* List of modes available for the monitor */
1763+ pScrn->display->modes, /* List of mode names that the screen is requesting */
1764+ clockRanges, /* list of clock ranges */
1765 NULL, /* list of line pitches */
1766 256, /* minimum line pitch */
1767- 3344, /* maximum line pitch */
1768- 32 * 8, /* pitch inc (bits) */
1769- 128, /* min height */
1770- 2508, /* max height */
1771+ max_pitch, /* maximum line pitch */
1772+ 16 * 8, /* pitch increment (in bits), we just want 16 bytes alignment */
1773+ 128, /* min virtual height */
1774+ max_height, /* maximum virtual height */
1775 pScrn->display->virtualX, /* virtual width */
1776 pScrn->display->virtualY, /* virtual height */
1777 pVia->videoRambytes, /* apertureSize */
1778@@ -1650,6 +1731,7 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
1779 return FALSE;
1780 }
1781
1782+ /* This function deletes modes in the modes field of the ScrnInfoRec that have been marked as invalid. */
1783 xf86PruneDriverModes(pScrn);
1784
1785 if (i == 0 || pScrn->modes == NULL) {
1786@@ -1662,9 +1744,17 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
1787 /* Set up screen parameters. */
1788 pVia->Bpp = pScrn->bitsPerPixel >> 3;
1789 pVia->Bpl = pScrn->displayWidth * pVia->Bpp;
1790+
1791+ /* This function fills in the Crtc fields for all the modes in the modes field of the ScrnInfoRec. */
1792 xf86SetCrtcForModes(pScrn, INTERLACE_HALVE_V);
1793+
1794+ /* Set the current mode to the first in the list */
1795 pScrn->currentMode = pScrn->modes;
1796+
1797+ /* Print the list of modes being used */
1798 xf86PrintModes(pScrn);
1799+
1800+ /* Set display resolution */
1801 xf86SetDpi(pScrn, 0, 0);
1802
1803 #ifdef USE_FB
1804@@ -1822,6 +1912,7 @@ VIALeaveVT(int scrnIndex, int flags)
1805 case VIA_P4M900:
1806 case VIA_VX800:
1807 case VIA_VX855:
1808+ case VIA_VX900:
1809 break;
1810 default:
1811 hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40);
1812@@ -1935,7 +2026,9 @@ VIASave(ScrnInfoPtr pScrn)
1813 Regs->SR17 = hwp->readSeq(hwp, 0x17);
1814 Regs->SR18 = hwp->readSeq(hwp, 0x18);
1815 Regs->SR19 = hwp->readSeq(hwp, 0x19);
1816+ /* PCI Bus Control */
1817 Regs->SR1A = hwp->readSeq(hwp, 0x1A);
1818+
1819 Regs->SR1B = hwp->readSeq(hwp, 0x1B);
1820 Regs->SR1C = hwp->readSeq(hwp, 0x1C);
1821 Regs->SR1D = hwp->readSeq(hwp, 0x1D);
1822@@ -1977,40 +2070,59 @@ VIASave(ScrnInfoPtr pScrn)
1823 Regs->SR4C = hwp->readSeq(hwp, 0x4C);
1824 break;
1825 }
1826- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
1827- "Non-Primary Adapter! saving VGA_SR_MODE only !!\n"));
1828+
1829+ /* Save Preemptive Arbiter Control Register */
1830+ Regs->SR4D = hwp->readSeq(hwp, 0x4D);
1831 DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Crtc...\n"));
1832
1833 Regs->CR13 = hwp->readCrtc(hwp, 0x13);
1834
1835 Regs->CR32 = hwp->readCrtc(hwp, 0x32);
1836 Regs->CR33 = hwp->readCrtc(hwp, 0x33);
1837- Regs->CR34 = hwp->readCrtc(hwp, 0x34);
1838+
1839 Regs->CR35 = hwp->readCrtc(hwp, 0x35);
1840 Regs->CR36 = hwp->readCrtc(hwp, 0x36);
1841
1842+
1843+
1844+ /* Starting Address */
1845+ /* Start Address High */
1846+ Regs->CR0C = hwp->readCrtc(hwp, 0x0C);
1847+ /* Start Address Low */
1848+ Regs->CR0D = hwp->readCrtc(hwp, 0x0D);
1849+ /* Starting Address Overflow Bits[28:24] */
1850 Regs->CR48 = hwp->readCrtc(hwp, 0x48);
1851+ /* CR34 are fire bits. Must be written after CR0C CR0D CR48. */
1852+ /* Starting Address Overflow Bits[23:16] */
1853+ Regs->CR34 = hwp->readCrtc(hwp, 0x34);
1854+
1855+
1856 Regs->CR49 = hwp->readCrtc(hwp, 0x49);
1857
1858 DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "TVSave...\n"));
1859 if (pBIOSInfo->TVI2CDev)
1860 ViaTVSave(pScrn);
1861
1862- /* Save LCD control registers. */
1863+ /* Save LCD control registers (from CR 0x50 to 0x93). */
1864 for (i = 0; i < 68; i++)
1865 Regs->CRTCRegs[i] = hwp->readCrtc(hwp, i + 0x50);
1866
1867 if (pVia->Chipset != VIA_CLE266 && pVia->Chipset != VIA_KM400) {
1868-
1869- Regs->CRA0 = hwp->readCrtc(hwp, 0xA0);
1870- Regs->CRA1 = hwp->readCrtc(hwp, 0xA1);
1871- Regs->CRA2 = hwp->readCrtc(hwp, 0xA2);
1872-
1873+ /* LVDS Channel 2 Function Select 0 / DVI Function Select */
1874 Regs->CR97 = hwp->readCrtc(hwp, 0x97);
1875+ /* LVDS Channel 1 Function Select 0 */
1876 Regs->CR99 = hwp->readCrtc(hwp, 0x99);
1877+ /* Digital Video Port 1 Function Select 0 */
1878 Regs->CR9B = hwp->readCrtc(hwp, 0x9B);
1879+ /* Power Now Control 4 */
1880 Regs->CR9F = hwp->readCrtc(hwp, 0x9F);
1881
1882+ /* Horizontal Scaling Initial Value */
1883+ Regs->CRA0 = hwp->readCrtc(hwp, 0xA0);
1884+ /* Vertical Scaling Initial Value */
1885+ Regs->CRA1 = hwp->readCrtc(hwp, 0xA1);
1886+ /* Scaling Enable Bit */
1887+ Regs->CRA2 = hwp->readCrtc(hwp, 0xA2);
1888 }
1889
1890 /* Save TMDS status */
1891@@ -2018,6 +2130,7 @@ VIASave(ScrnInfoPtr pScrn)
1892 case VIA_CX700:
1893 case VIA_VX800:
1894 case VIA_VX855:
1895+ case VIA_VX900:
1896 Regs->CRD2 = hwp->readCrtc(hwp, 0xD2);
1897 break;
1898 }
1899@@ -2045,15 +2158,15 @@ VIARestore(ScrnInfoPtr pScrn)
1900 /* Unlock extended registers. */
1901 hwp->writeSeq(hwp, 0x10, 0x01);
1902
1903- /*=* CR6A, CR6B, CR6C must be reset before restore
1904- standard vga regs, or system will be hang. *=*/
1905+ /*=* CR6A, CR6B, CR6C must be reset before restoring
1906+ standard vga regs, or system will hang. *=*/
1907 /*=* TODO Check is reset IGA2 channel before disable IGA2 channel
1908- is neccesery or it may cause some line garbage. *=*/
1909+ is necessary or it may cause some line garbage. *=*/
1910 hwp->writeCrtc(hwp, 0x6A, 0x00);
1911 hwp->writeCrtc(hwp, 0x6B, 0x00);
1912 hwp->writeCrtc(hwp, 0x6C, 0x00);
1913
1914- /* Gamma must disable before restore pallette */
1915+ /* Gamma must be disabled before restoring palette */
1916 ViaGammaDisable(pScrn);
1917
1918 if (pBIOSInfo->TVI2CDev)
1919@@ -2098,11 +2211,19 @@ VIARestore(ScrnInfoPtr pScrn)
1920 hwp->writeSeq(hwp, 0x45, Regs->SR45);
1921 hwp->writeSeq(hwp, 0x46, Regs->SR46);
1922
1923+ /* Reset VCK PLL */
1924+ hwp->writeSeq(hwp, 0x40, hwp->readSeq(hwp, 0x40) | 0x02); /* Set SR40[1] to 1 */
1925+ hwp->writeSeq(hwp, 0x40, hwp->readSeq(hwp, 0x40) & 0xFD); /* Set SR40[1] to 0 */
1926+
1927 /* ECK Clock Synthesizer: */
1928 hwp->writeSeq(hwp, 0x47, Regs->SR47);
1929 hwp->writeSeq(hwp, 0x48, Regs->SR48);
1930 hwp->writeSeq(hwp, 0x49, Regs->SR49);
1931
1932+ /* Reset ECK PLL */
1933+ hwp->writeSeq(hwp, 0x40, hwp->readSeq(hwp, 0x40) | 0x01); /* Set SR40[0] to 1 */
1934+ hwp->writeSeq(hwp, 0x40, hwp->readSeq(hwp, 0x40) & 0xFE); /* Set SR40[0] to 0 */
1935+
1936 switch (pVia->Chipset) {
1937 case VIA_CLE266:
1938 case VIA_KM400:
1939@@ -2112,9 +2233,22 @@ VIARestore(ScrnInfoPtr pScrn)
1940 hwp->writeSeq(hwp, 0x4A, Regs->SR4A);
1941 hwp->writeSeq(hwp, 0x4B, Regs->SR4B);
1942 hwp->writeSeq(hwp, 0x4C, Regs->SR4C);
1943+
1944+ /* Reset LCK PLL */
1945+ hwp->writeSeq(hwp, 0x40, hwp->readSeq(hwp, 0x40) | 0x04); /* Set SR40[2] to 1 */
1946+ hwp->writeSeq(hwp, 0x40, hwp->readSeq(hwp, 0x40) & 0xFB); /* Set SR40[2] to 0 */
1947 break;
1948 }
1949
1950+ /* Restore Preemptive Arbiter Control Register
1951+ * VX800 and VX855 should restore this register too,
1952+ * but I don't do that for I don't want to affect any
1953+ * chips now.
1954+ */
1955+ if (pVia->Chipset == VIA_VX900) {
1956+ hwp->writeSeq(hwp, 0x4D, Regs->SR4D);
1957+ }
1958+
1959 /* Reset dotclocks. */
1960 ViaSeqMask(hwp, 0x40, 0x06, 0x06);
1961 ViaSeqMask(hwp, 0x40, 0x00, 0x06);
1962@@ -2127,14 +2261,23 @@ VIARestore(ScrnInfoPtr pScrn)
1963 hwp->writeCrtc(hwp, 0x32, Regs->CR32);
1964 /* HSYNCH Adjuster */
1965 hwp->writeCrtc(hwp, 0x33, Regs->CR33);
1966- /* Starting Address Overflow */
1967- hwp->writeCrtc(hwp, 0x34, Regs->CR34);
1968 /* Extended Overflow */
1969 hwp->writeCrtc(hwp, 0x35, Regs->CR35);
1970 /*Power Management 3 (Monitor Control) */
1971 hwp->writeCrtc(hwp, 0x36, Regs->CR36);
1972
1973+ /* Starting Address */
1974+ /* Start Address High */
1975+ hwp->writeCrtc(hwp, 0x0C, Regs->CR0C);
1976+ /* Start Address Low */
1977+ hwp->writeCrtc(hwp, 0x0D, Regs->CR0D);
1978+ /* Starting Address Overflow Bits[28:24] */
1979 hwp->writeCrtc(hwp, 0x48, Regs->CR48);
1980+ /* CR34 are fire bits. Must be written after CR0C CR0D CR48. */
1981+ /* Starting Address Overflow Bits[23:16] */
1982+ hwp->writeCrtc(hwp, 0x34, Regs->CR34);
1983+
1984+
1985 hwp->writeCrtc(hwp, 0x49, Regs->CR49);
1986
1987 /* Restore LCD control registers. */
1988@@ -2160,6 +2303,7 @@ VIARestore(ScrnInfoPtr pScrn)
1989 case VIA_CX700:
1990 case VIA_VX800:
1991 case VIA_VX855:
1992+ case VIA_VX900:
1993 /* LVDS Control Register */
1994 hwp->writeCrtc(hwp, 0xD2, Regs->CRD2);
1995 break;
1996@@ -2189,6 +2333,7 @@ ViaMMIOEnable(ScrnInfoPtr pScrn)
1997 case VIA_P4M900:
1998 case VIA_VX800:
1999 case VIA_VX855:
2000+ case VIA_VX900:
2001 ViaSeqMask(hwp, 0x1A, 0x08, 0x08);
2002 break;
2003 default:
2004@@ -2212,6 +2357,7 @@ ViaMMIODisable(ScrnInfoPtr pScrn)
2005 case VIA_P4M900:
2006 case VIA_VX800:
2007 case VIA_VX855:
2008+ case VIA_VX900:
2009 ViaSeqMask(hwp, 0x1A, 0x00, 0x08);
2010 break;
2011 default:
2012@@ -2328,10 +2474,18 @@ VIAMapFB(ScrnInfoPtr pScrn)
2013 VIAPtr pVia = VIAPTR(pScrn);
2014
2015 #ifdef XSERVER_LIBPCIACCESS
2016- pVia->FrameBufferBase = pVia->PciInfo->regions[0].base_addr;
2017+ if (pVia->Chipset == VIA_VX900) {
2018+ pVia->FrameBufferBase = pVia->PciInfo->regions[2].base_addr;
2019+ } else {
2020+ pVia->FrameBufferBase = pVia->PciInfo->regions[0].base_addr;
2021+ }
2022 int err;
2023 #else
2024- pVia->FrameBufferBase = pVia->PciInfo->memBase[0];
2025+ if (pVia->Chipset == VIA_VX900) {
2026+ pVia->FrameBufferBase = pVia->PciInfo->memBase[2];
2027+ } else {
2028+ pVia->FrameBufferBase = pVia->PciInfo->memBase[0];
2029+ }
2030 #endif
2031
2032 DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAMapFB\n"));
2033@@ -2453,7 +2607,6 @@ static void
2034 VIALoadRgbLut(ScrnInfoPtr pScrn, int numColors, int *indices, LOCO *colors,
2035 VisualPtr pVisual)
2036 {
2037- VIAPtr pVia = VIAPTR(pScrn);
2038 vgaHWPtr hwp = VGAHWPTR(pScrn);
2039
2040 int i, j, index;
2041@@ -2844,7 +2997,7 @@ VIAInternalScreenInit(int scrnIndex, ScreenPtr pSc
2042
2043 if (pVia->shadowFB) {
2044 pVia->ShadowPitch = BitmapBytePad(pScrn->bitsPerPixel * width);
2045- pVia->ShadowPtr = xalloc(pVia->ShadowPitch * shadowHeight);
2046+ pVia->ShadowPtr = malloc(pVia->ShadowPitch * shadowHeight);
2047 displayWidth = pVia->ShadowPitch / (pScrn->bitsPerPixel >> 3);
2048 FBStart = pVia->ShadowPtr;
2049 } else {
2050@@ -2880,7 +3033,6 @@ static Bool
2051 VIAWriteMode(ScrnInfoPtr pScrn, DisplayModePtr mode)
2052 {
2053 VIAPtr pVia = VIAPTR(pScrn);
2054- VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo;
2055
2056 DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAWriteMode\n"));
2057
2058@@ -2917,6 +3069,7 @@ VIAWriteMode(ScrnInfoPtr pScrn, DisplayModePtr mod
2059 case VIA_P4M900:
2060 case VIA_VX800:
2061 case VIA_VX855:
2062+ case VIA_VX900:
2063 /*
2064 * Since we are using virtual, we need to adjust
2065 * the offset to match the framebuffer alignment.
2066@@ -2963,6 +3116,7 @@ VIACloseScreen(int scrnIndex, ScreenPtr pScreen)
2067 case VIA_P4M900:
2068 case VIA_VX800:
2069 case VIA_VX855:
2070+ case VIA_VX900:
2071 break;
2072 default :
2073 hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40);
2074@@ -2986,11 +3140,11 @@ VIACloseScreen(int scrnIndex, ScreenPtr pScreen)
2075
2076 viaExitAccel(pScreen);
2077 if (pVia->ShadowPtr) {
2078- xfree(pVia->ShadowPtr);
2079+ free(pVia->ShadowPtr);
2080 pVia->ShadowPtr = NULL;
2081 }
2082 if (pVia->DGAModes) {
2083- xfree(pVia->DGAModes);
2084+ free(pVia->DGAModes);
2085 pVia->DGAModes = NULL;
2086 }
2087
2088@@ -3033,9 +3187,7 @@ static void
2089 VIAAdjustFrame(int scrnIndex, int x, int y, int flags)
2090 {
2091 ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
2092- vgaHWPtr hwp = VGAHWPTR(pScrn);
2093 VIAPtr pVia = VIAPTR(pScrn);
2094- CARD32 Base;
2095
2096 DEBUG(xf86DrvMsg(scrnIndex, X_INFO, "VIAAdjustFrame %dx%d\n", x, y));
2097
2098@@ -3173,7 +3325,6 @@ VIASwitchMode(int scrnIndex, DisplayModePtr mode,
2099 static void
2100 VIADPMS(ScrnInfoPtr pScrn, int mode, int flags)
2101 {
2102- vgaHWPtr hwp = VGAHWPTR(pScrn);
2103 VIAPtr pVia = VIAPTR(pScrn);
2104 VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo;
2105
2106Index: src/via_crtc.c
2107===================================================================
2108--- a/src/via_crtc.c (.../tags/release_0_2_904) (revision 916)
2109+++ b/src/via_crtc.c (.../trunk) (revision 916)
2110@@ -174,6 +174,7 @@ ViaFirstCRTCSetMode(ScrnInfoPtr pScrn, DisplayMode
2111 case VIA_P4M900:
2112 case VIA_VX800:
2113 case VIA_VX855:
2114+ case VIA_VX900:
2115 break;
2116 default:
2117 ViaSeqMask(hwp, 0x16, 0x08, 0xBF);
2118@@ -234,8 +235,8 @@ ViaFirstCRTCSetMode(ScrnInfoPtr pScrn, DisplayMode
2119 /* Primary starting address -> 0x00, adjustframe does the rest */
2120 hwp->writeCrtc(hwp, 0x0C, 0x00);
2121 hwp->writeCrtc(hwp, 0x0D, 0x00);
2122+ ViaCrtcMask(hwp, 0x48, 0x00, 0x03); /* is this even possible on CLE266A ? */
2123 hwp->writeCrtc(hwp, 0x34, 0x00);
2124- ViaCrtcMask(hwp, 0x48, 0x00, 0x03); /* is this even possible on CLE266A ? */
2125
2126 /* vertical sync start : 2047 */
2127 temp = mode->CrtcVSyncStart;
2128@@ -278,6 +279,7 @@ ViaFirstCRTCSetMode(ScrnInfoPtr pScrn, DisplayMode
2129 case VIA_P4M900:
2130 case VIA_VX800:
2131 case VIA_VX855:
2132+ case VIA_VX900:
2133 break;
2134 default:
2135 /* some leftovers */
2136@@ -314,6 +316,7 @@ ViaFirstCRTCSetMode(ScrnInfoPtr pScrn, DisplayMode
2137 case VIA_P4M900:
2138 case VIA_VX800:
2139 case VIA_VX855:
2140+ case VIA_VX900:
2141 break;
2142 default:
2143 /* some leftovers */
2144@@ -331,15 +334,20 @@ ViaFirstCRTCSetStartingAddress(ScrnInfoPtr pScrn,
2145 CARD32 Base;
2146 CARD32 tmp;
2147
2148+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaFirstCRTCSetStartingAddress\n"));
2149+
2150 Base = (y * pScrn->displayWidth + x) * (pScrn->bitsPerPixel / 8);
2151 Base = Base >> 1;
2152
2153 hwp->writeCrtc(hwp, 0x0C, (Base & 0xFF00) >> 8);
2154 hwp->writeCrtc(hwp, 0x0D, Base & 0xFF);
2155+ /* FIXME The proper starting address for CR48 is 0x1F - Bits[28:24] */
2156+ if (!(pVia->Chipset == VIA_CLE266 && CLE266_REV_IS_AX(pVia->ChipRev)))
2157+ ViaCrtcMask(hwp, 0x48, Base >> 24, 0x0F);
2158+ /* CR34 are fire bits. Must be written after CR0C CR0D CR48. */
2159 hwp->writeCrtc(hwp, 0x34, (Base & 0xFF0000) >> 16);
2160
2161- if (!(pVia->Chipset == VIA_CLE266 && CLE266_REV_IS_AX(pVia->ChipRev)))
2162- ViaCrtcMask(hwp, 0x48, Base >> 24, 0x0F);
2163+
2164 }
2165
2166 void
2167@@ -434,6 +442,7 @@ ViaSecondCRTCSetMode(ScrnInfoPtr pScrn, DisplayMod
2168 case VIA_P4M900:
2169 case VIA_VX800:
2170 case VIA_VX855:
2171+ case VIA_VX900:
2172 break;
2173 default:
2174 ViaSeqMask(hwp, 0x16, 0x08, 0xBF);
2175@@ -518,6 +527,7 @@ ViaSecondCRTCSetMode(ScrnInfoPtr pScrn, DisplayMod
2176 case VIA_P4M900:
2177 case VIA_VX800:
2178 case VIA_VX855:
2179+ case VIA_VX900:
2180 break;
2181 default:
2182 /* some leftovers */
2183Index: src/via_swov.c
2184===================================================================
2185--- a/src/via_swov.c (.../tags/release_0_2_904) (revision 916)
2186+++ b/src/via_swov.c (.../trunk) (revision 916)
2187@@ -65,6 +65,31 @@
2188 #define IN_VIDEO_DISPLAY (*((unsigned long volatile *)(pVia->VidMapBase+V_FLAGS))&VBI_STATUS)
2189 #define VIA_FIRETIMEOUT 40000
2190
2191+enum HQV_CME_Regs {
2192+ HQV_SDO_CTRL1,
2193+ HQV_SDO_CTRL2,
2194+ HQV_SDO_CTRL3,
2195+ HQV_SDO_CTRL4
2196+};
2197+
2198+/* register offsets for VT3553/VX800 */
2199+static const unsigned hqv_cme_regs[] = {
2200+ [HQV_SDO_CTRL1] = HQV_SRC_DATA_OFFSET_CONTROL1,
2201+ [HQV_SDO_CTRL2] = HQV_SRC_DATA_OFFSET_CONTROL2,
2202+ [HQV_SDO_CTRL3] = HQV_SRC_DATA_OFFSET_CONTROL3,
2203+ [HQV_SDO_CTRL4] = HQV_SRC_DATA_OFFSET_CONTROL4
2204+};
2205+
2206+/* register hqv offsets for new VT3409/VX855 */
2207+static const unsigned hqv_cme_regs_409[] = {
2208+ [HQV_SDO_CTRL1] = HQV_SRC_DATA_OFFSET_CTRL1_409,
2209+ [HQV_SDO_CTRL2] = HQV_SRC_DATA_OFFSET_CTRL2_409,
2210+ [HQV_SDO_CTRL3] = HQV_SRC_DATA_OFFSET_CTRL3_409,
2211+ [HQV_SDO_CTRL4] = HQV_SRC_DATA_OFFSET_CTRL4_409
2212+};
2213+
2214+#define HQV_CME_REG(HWDiff, name) (HWDiff)->HQVCmeRegs[name]
2215+
2216 static void
2217 viaWaitVideoCommandFire(VIAPtr pVia)
2218 {
2219@@ -88,6 +113,7 @@ viaWaitHQVFlip(VIAPtr pVia)
2220 {
2221 unsigned long proReg = 0;
2222 CARD32 volatile *pdwState;
2223+ unsigned count = 50000;
2224
2225 if (pVia->ChipId == PCI_CHIP_VT3259
2226 && !(pVia->swov.gdwVideoFlagSW & VIDEO_1_INUSE))
2227@@ -96,10 +122,9 @@ viaWaitHQVFlip(VIAPtr pVia)
2228 pdwState = (CARD32 volatile *)(pVia->VidMapBase + (HQV_CONTROL + proReg));
2229
2230 if (pVia->VideoEngine == VIDEO_ENGINE_CME) {
2231- // while (*pdwState & (HQV_SUBPIC_FLIP | HQV_SW_FLIP)) ;
2232- while (*pdwState & HQV_SUBPIC_FLIP);
2233+ while (--count && (*pdwState & HQV_SUBPIC_FLIP));
2234 } else {
2235- while (!(*pdwState & HQV_FLIP_STATUS)) ;
2236+ while (--count && !(*pdwState & HQV_FLIP_STATUS)) ;
2237 }
2238 }
2239
2240@@ -109,8 +134,9 @@ viaWaitHQVFlipClear(VIAPtr pVia, unsigned long dwD
2241 CARD32 volatile *pdwState =
2242 (CARD32 volatile *)(pVia->VidMapBase + HQV_CONTROL);
2243 *pdwState = dwData;
2244+ unsigned count = 50000;
2245
2246- while ((*pdwState & HQV_FLIP_STATUS)) {
2247+ while (--count && (*pdwState & HQV_FLIP_STATUS)) {
2248 VIDOutD(HQV_CONTROL, *pdwState | HQV_FLIP_STATUS);
2249 }
2250 }
2251@@ -126,6 +152,7 @@ viaWaitHQVDone(VIAPtr pVia)
2252 {
2253 CARD32 volatile *pdwState;
2254 unsigned long proReg = 0;
2255+ unsigned count = 50000;
2256
2257 if (pVia->ChipId == PCI_CHIP_VT3259
2258 && !(pVia->swov.gdwVideoFlagSW & VIDEO_1_INUSE))
2259@@ -133,7 +160,7 @@ viaWaitHQVDone(VIAPtr pVia)
2260
2261 pdwState = (CARD32 volatile *)(pVia->VidMapBase + (HQV_CONTROL + proReg));
2262 if (pVia->swov.MPEG_ON) {
2263- while ((*pdwState & HQV_SW_FLIP)) ;
2264+ while (--count && (*pdwState & HQV_SW_FLIP)) ;
2265 }
2266 }
2267
2268@@ -179,12 +206,14 @@ ResetVidRegBuffer(VIAPtr pVia)
2269 static void
2270 SaveVideoRegister(VIAPtr pVia, CARD32 index, CARD32 data)
2271 {
2272+ if (pVia->VidRegCursor >= VIDREG_BUFFER_SIZE) {
2273+ DBG_DD(ErrorF("SaveVideoRegister: Out of video register space flushing"));
2274+ FlushVidRegBuffer(pVia);
2275+ ResetVidRegBuffer(pVia);
2276+ }
2277+
2278 pVia->VidRegBuffer[pVia->VidRegCursor++] = index;
2279 pVia->VidRegBuffer[pVia->VidRegCursor++] = data;
2280-
2281- if (pVia->VidRegCursor > VIDREG_BUFFER_SIZE) {
2282- DBG_DD(ErrorF("SaveVideoRegister: Out of video register space"));
2283- }
2284 }
2285
2286 /*
2287@@ -224,6 +253,7 @@ VIAVidHWDiffInit(ScrnInfoPtr pScrn)
2288 HWDiff->dwHQVDisablePatch = VID_HWDIFF_TRUE;
2289 HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
2290 }
2291+ HWDiff->dwNewScaleCtl = VID_HWDIFF_FALSE;
2292 break;
2293 case VIA_KM400:
2294 HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE;
2295@@ -232,6 +262,7 @@ VIAVidHWDiffInit(ScrnInfoPtr pScrn)
2296 HWDiff->dwHQVInitPatch = VID_HWDIFF_FALSE;
2297 HWDiff->dwHQVDisablePatch = VID_HWDIFF_TRUE;
2298 HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
2299+ HWDiff->dwNewScaleCtl = VID_HWDIFF_FALSE;
2300 break;
2301 case VIA_K8M800:
2302 HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE;
2303@@ -240,6 +271,7 @@ VIAVidHWDiffInit(ScrnInfoPtr pScrn)
2304 HWDiff->dwHQVInitPatch = VID_HWDIFF_FALSE;
2305 HWDiff->dwHQVDisablePatch = VID_HWDIFF_TRUE;
2306 HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
2307+ HWDiff->dwNewScaleCtl = VID_HWDIFF_FALSE;
2308 break;
2309 case VIA_PM800:
2310 HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE;
2311@@ -248,6 +280,8 @@ VIAVidHWDiffInit(ScrnInfoPtr pScrn)
2312 HWDiff->dwHQVInitPatch = VID_HWDIFF_FALSE;
2313 HWDiff->dwHQVDisablePatch = VID_HWDIFF_FALSE;
2314 HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
2315+ HWDiff->dwNewScaleCtl = VID_HWDIFF_FALSE;
2316+ HWDiff->HQVCmeRegs = hqv_cme_regs;
2317 break;
2318 case VIA_VM800:
2319 case VIA_P4M900:
2320@@ -257,6 +291,8 @@ VIAVidHWDiffInit(ScrnInfoPtr pScrn)
2321 HWDiff->dwHQVInitPatch = VID_HWDIFF_FALSE;
2322 HWDiff->dwHQVDisablePatch = VID_HWDIFF_TRUE;
2323 HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
2324+ HWDiff->dwNewScaleCtl = VID_HWDIFF_FALSE;
2325+ HWDiff->HQVCmeRegs = hqv_cme_regs;
2326 break;
2327 case VIA_K8M890:
2328 HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE;
2329@@ -265,6 +301,8 @@ VIAVidHWDiffInit(ScrnInfoPtr pScrn)
2330 HWDiff->dwHQVInitPatch = VID_HWDIFF_FALSE;
2331 HWDiff->dwHQVDisablePatch = VID_HWDIFF_TRUE;
2332 HWDiff->dwNeedV1Prefetch = VID_HWDIFF_TRUE;
2333+ HWDiff->dwNewScaleCtl = VID_HWDIFF_FALSE;
2334+ HWDiff->HQVCmeRegs = hqv_cme_regs;
2335 break;
2336 case VIA_P4M890:
2337 HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE;
2338@@ -273,6 +311,8 @@ VIAVidHWDiffInit(ScrnInfoPtr pScrn)
2339 HWDiff->dwHQVInitPatch = VID_HWDIFF_FALSE;
2340 HWDiff->dwHQVDisablePatch = VID_HWDIFF_TRUE;
2341 HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
2342+ HWDiff->dwNewScaleCtl = VID_HWDIFF_FALSE;
2343+ HWDiff->HQVCmeRegs = hqv_cme_regs;
2344 break;
2345 case VIA_CX700:
2346 HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE;
2347@@ -281,8 +321,19 @@ VIAVidHWDiffInit(ScrnInfoPtr pScrn)
2348 HWDiff->dwHQVInitPatch = VID_HWDIFF_FALSE;
2349 HWDiff->dwHQVDisablePatch = VID_HWDIFF_FALSE;
2350 HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
2351+ HWDiff->dwNewScaleCtl = VID_HWDIFF_FALSE;
2352+ HWDiff->HQVCmeRegs = hqv_cme_regs;
2353 break;
2354 case VIA_VX800:
2355+ HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE;
2356+ HWDiff->dwHQVFetchByteUnit = VID_HWDIFF_TRUE;
2357+ HWDiff->dwSupportTwoColorKey = VID_HWDIFF_TRUE;
2358+ HWDiff->dwHQVInitPatch = VID_HWDIFF_FALSE;
2359+ HWDiff->dwHQVDisablePatch = VID_HWDIFF_FALSE;
2360+ HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
2361+ HWDiff->dwNewScaleCtl = VID_HWDIFF_TRUE;
2362+ HWDiff->HQVCmeRegs = hqv_cme_regs;
2363+ break;
2364 case VIA_VX855:
2365 HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE;
2366 HWDiff->dwHQVFetchByteUnit = VID_HWDIFF_TRUE;
2367@@ -290,6 +341,8 @@ VIAVidHWDiffInit(ScrnInfoPtr pScrn)
2368 HWDiff->dwHQVInitPatch = VID_HWDIFF_FALSE;
2369 HWDiff->dwHQVDisablePatch = VID_HWDIFF_FALSE;
2370 HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
2371+ HWDiff->dwNewScaleCtl = VID_HWDIFF_TRUE;
2372+ HWDiff->HQVCmeRegs = hqv_cme_regs_409;
2373 break;
2374 default:
2375 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
2376@@ -509,10 +562,12 @@ viaOverlayHQVCalcZoomWidth(VIAPtr pVia,
2377 unsigned long *pMiniCtl,
2378 unsigned long *pHQVfilterCtl,
2379 unsigned long *pHQVminiCtl,
2380+ unsigned long *pHQVscaleCtlH,
2381 unsigned long *pHQVzoomflag)
2382 {
2383 unsigned long tmp, sw1, d, falign, mdiv;
2384 Bool zoom_ok = TRUE;
2385+ VIAHWDiff *hwDiff = &pVia->HWDiff;
2386
2387 CARD32 HQVfilter[5] = { HQV_H_FILTER_DEFAULT, HQV_H_TAP4_121,
2388 HQV_H_TAP4_121, HQV_H_TAP8_12221, HQV_H_TAP8_12221
2389@@ -525,24 +580,57 @@ viaOverlayHQVCalcZoomWidth(VIAPtr pVia,
2390 if (srcWidth == dstWidth) { /* No zoom */
2391 *pHQVfilterCtl |= HQV_H_FILTER_DEFAULT;
2392 } else if (srcWidth < dstWidth) { /* Zoom in */
2393+ *pZoomCtl &= 0x0000FFFF;
2394+ tmp = srcWidth * 0x800 / dstWidth;
2395+ *pZoomCtl |= ((tmp & 0x7ff) << 16) | V1_X_ZOOM_ENABLE;
2396+ *pMiniCtl |= V1_X_INTERPOLY;
2397+ zoom_ok = !(tmp > 0x7ff);
2398
2399- tmp = srcWidth * 0x800 / dstWidth;
2400- *pZoomCtl = ((tmp & 0x7ff) << 16) | V1_X_ZOOM_ENABLE;
2401- *pMiniCtl |= V1_X_INTERPOLY;
2402- zoom_ok = !(tmp > 0x7ff);
2403+ *pHQVzoomflag = 1;
2404+ *pHQVfilterCtl |= HQV_H_FILTER_DEFAULT;
2405+ } else { /* srcWidth > dstWidth - Zoom out */
2406+ if (hwDiff->dwNewScaleCtl) {
2407+ if (srcWidth > (dstWidth << 3)) {
2408+ /*<1/8*/
2409+ /*FIXME!*/
2410+ if (dstWidth <= 32) {
2411+ dstWidth = 33;
2412+ }
2413+ if (srcWidth > (dstWidth << 5)) {
2414+ tmp = 1 * 0x1000 / 31;
2415+ } else {
2416+ tmp = (dstWidth * 0x1000) / srcWidth;
2417+ }
2418
2419- *pHQVzoomflag = 1;
2420- *pHQVfilterCtl |= HQV_H_FILTER_DEFAULT;
2421+ *pHQVscaleCtlH = HQV_H_SCALE_DOWN_UNDER_EIGHTH;
2422+ } else if (srcWidth == (dstWidth << 3)) {
2423+ /*1/8*/
2424+ tmp = ((dstWidth - 1) * 0x1000) / srcWidth;
2425+ *pHQVscaleCtlH = HQV_H_SCALE_DOWN_UNDER_EIGHTH;
2426+ } else if (srcWidth > (dstWidth << 2)) {
2427+ /*1/4 -1/8 zoom-out*/
2428+ tmp = (srcWidth * 0x1000) / dstWidth;
2429+ *pHQVscaleCtlH = HQV_H_SCALE_DOWN_FOURTH_TO_EIGHTH;
2430+ } else {
2431+ /*1-1/4 zoom-out*/
2432+ /*setting :src/(destination+0.5)*/
2433+ tmp = (srcWidth * 0x2000) / ((dstWidth << 1) + 1);
2434+ *pHQVscaleCtlH = HQV_H_SCALE_DOWN_FOURTH_TO_1;
2435+ }
2436
2437- } else { /* srcWidth > dstWidth - Zoom out */
2438+ /*rounding to nearest interger*/
2439+ tmp += (((tmp * 0x1000) & 0xfff) > 1) ? 1 : 0;
2440+ *pHQVscaleCtlH |= (tmp & 0x7fff) | HQV_H_SCALE_ENABLE;
2441+ } else {
2442+ /* HQV rounding patch, instead of:
2443+ * //tmp = dstWidth*0x0800 / srcWidth; */
2444+ tmp = dstWidth * 0x800 * 0x400 / srcWidth;
2445+ tmp = tmp / 0x400 + ((tmp & 0x3ff) ? 1 : 0);
2446
2447- /* HQV rounding patch, instead of:
2448- * //tmp = dstWidth*0x0800 / srcWidth; */
2449- tmp = dstWidth * 0x800 * 0x400 / srcWidth;
2450- tmp = tmp / 0x400 + ((tmp & 0x3ff) ? 1 : 0);
2451+ *pHQVminiCtl = (tmp & 0x7ff) | HQV_H_MINIFY_ENABLE | HQV_H_MINIFY_DOWN;
2452
2453- *pHQVminiCtl = (tmp & 0x7ff) | HQV_H_MINIFY_ENABLE | HQV_H_MINIFY_DOWN;
2454-
2455+ *pHQVminiCtl |= HQV_HDEBLOCK_FILTER;
2456+ }
2457 /* Scale down the picture by a factor mdiv = (1 << d) = {2, 4, 8 or 16} */
2458
2459 sw1 = srcWidth;
2460@@ -561,27 +649,25 @@ viaOverlayHQVCalcZoomWidth(VIAPtr pVia,
2461 *pMiniCtl |= ((d << 1) - 1) << 24; /* <= {1,3,5,7} << 24 */
2462
2463 *pHQVfilterCtl |= HQVfilter[d];
2464- /* *pHQVminiCtl = HQVmini[d]; */
2465- *pHQVminiCtl |= HQV_HDEBLOCK_FILTER;
2466
2467- /* Scale to arbitrary size, on top of previous scaling by (1 << d). */
2468+ /* Scale to arbitrary size, on top of previous scaling by (1 << d). */
2469
2470- if (sw1 < dstWidth) {
2471- /* CLE bug
2472- *pZoomCtl = sw1 * 0x0800 / dstWidth;*/
2473- *pZoomCtl = (sw1 - 2) * 0x0800 / dstWidth;
2474- *pZoomCtl = ((*pZoomCtl & 0x7ff) << 16) | V1_X_ZOOM_ENABLE;
2475- }
2476- }
2477+ if (sw1 < dstWidth) {
2478+ /* CLE bug
2479+ *pZoomCtl = sw1 * 0x0800 / dstWidth;*/
2480+ *pZoomCtl = (sw1 - 2) * 0x0800 / dstWidth;
2481+ *pZoomCtl = ((*pZoomCtl & 0x7ff) << 16) | V1_X_ZOOM_ENABLE;
2482+ }
2483
2484- if (videoFlag & VIDEO_1_INUSE) {
2485- pVia->swov.overlayRecordV1.dwFetchAlignment = falign;
2486- pVia->swov.overlayRecordV1.dwminifyH = mdiv;
2487- } else {
2488- pVia->swov.overlayRecordV3.dwFetchAlignment = falign;
2489- pVia->swov.overlayRecordV3.dwminifyH = mdiv;
2490- }
2491+ if (videoFlag & VIDEO_1_INUSE) {
2492+ pVia->swov.overlayRecordV1.dwFetchAlignment = falign;
2493+ pVia->swov.overlayRecordV1.dwminifyH = mdiv;
2494+ } else {
2495+ pVia->swov.overlayRecordV3.dwFetchAlignment = falign;
2496+ pVia->swov.overlayRecordV3.dwminifyH = mdiv;
2497+ }
2498
2499+ }
2500 return zoom_ok;
2501 }
2502
2503@@ -591,10 +677,12 @@ viaOverlayHQVCalcZoomHeight(VIAPtr pVia,
2504 unsigned long *pZoomCtl, unsigned long *pMiniCtl,
2505 unsigned long *pHQVfilterCtl,
2506 unsigned long *pHQVminiCtl,
2507+ unsigned long *pHQVscaleCtlV,
2508 unsigned long *pHQVzoomflag)
2509 {
2510 unsigned long tmp, sh1, d;
2511 Bool zoom_ok = TRUE;
2512+ VIAHWDiff *hwDiff = &pVia->HWDiff;
2513
2514 CARD32 HQVfilter[5] = { HQV_V_TAP4_121, HQV_V_TAP4_121, HQV_V_TAP4_121,
2515 HQV_V_TAP8_12221, HQV_V_TAP8_12221 };
2516@@ -608,48 +696,58 @@ viaOverlayHQVCalcZoomHeight(VIAPtr pVia,
2517 if (srcHeight == dstHeight) { /* No zoom */
2518 *pHQVfilterCtl |= HQV_V_TAP4_121;
2519 } else if (srcHeight < dstHeight) { /* Zoom in */
2520+ *pZoomCtl &= 0xFFFF0000;
2521+ tmp = srcHeight * 0x400 / dstHeight - 1;
2522+ *pZoomCtl |= ((tmp & 0x3ff) | V1_Y_ZOOM_ENABLE);
2523+ *pMiniCtl |= (V1_Y_INTERPOLY | V1_YCBCR_INTERPOLY);
2524
2525- tmp = srcHeight * 0x0400 / dstHeight;
2526- *pZoomCtl |= ((tmp & 0x3ff) | V1_Y_ZOOM_ENABLE);
2527- *pMiniCtl |= (V1_Y_INTERPOLY | V1_YCBCR_INTERPOLY);
2528-
2529- *pHQVzoomflag = 1;
2530- *pHQVfilterCtl |= HQV_V_TAP4_121;
2531+ *pHQVzoomflag = 1;
2532+ *pHQVfilterCtl |= HQV_V_TAP4_121;
2533 } else { /* srcHeight > dstHeight - Zoom out */
2534+ if (hwDiff->dwNewScaleCtl) {
2535+ /*setting :src/(destination+0.5)*/
2536+ tmp = srcHeight * 0x2000 / ((dstHeight << 1) + 1);
2537+ tmp += (((tmp * 0x1000) & 0xfff) > 1) ? 1 : 0;
2538+ if ((tmp & 0x1ffff) == 0) {
2539+ tmp = 0x1ffff;
2540+ }
2541
2542- /* HQV rounding patch, instead of:
2543- * //tmp = dstHeight*0x0800 / srcHeight; */
2544- tmp = dstHeight * 0x0800 * 0x400 / srcHeight;
2545- tmp = tmp / 0x400 + ((tmp & 0x3ff) ? 1 : 0);
2546- *pHQVminiCtl |= (((tmp & 0x7ff) << 16) | HQV_V_MINIFY_ENABLE
2547- | HQV_V_MINIFY_DOWN);
2548+ *pHQVscaleCtlV = (tmp & 0x1ffff) | HQV_V_SCALE_ENABLE| HQV_V_SCALE_DOWN;
2549+ } else {
2550+ /* HQV rounding patch, instead of:
2551+ * //tmp = dstHeight*0x0800 / srcHeight; */
2552+ tmp = dstHeight * 0x0800 * 0x400 / srcHeight;
2553+ tmp = tmp / 0x400 + ((tmp & 0x3ff) ? 1 : 0);
2554+ *pHQVminiCtl |= (((tmp & 0x7ff) << 16) | HQV_V_MINIFY_ENABLE
2555+ | HQV_V_MINIFY_DOWN);
2556
2557- /* Scale down the picture by a factor (1 << d) = {2, 4, 8 or 16} */
2558+ /* Scale down the picture by a factor (1 << d) = {2, 4, 8 or 16} */
2559+
2560+ sh1 = srcHeight;
2561+ for (d = 1; d < 5; d++) {
2562+ sh1 >>= 1;
2563+ if (sh1 <= dstHeight)
2564+ break;
2565+ }
2566+ if (d == 5) { /* Too small. */
2567+ d = 4;
2568+ zoom_ok = FALSE;
2569+ }
2570
2571- sh1 = srcHeight;
2572- for (d = 1; d < 5; d++) {
2573- sh1 >>= 1;
2574- if (sh1 <= dstHeight)
2575- break;
2576- }
2577- if (d == 5) { /* Too small. */
2578- d = 4;
2579- zoom_ok = FALSE;
2580- }
2581+ *pMiniCtl |= ((d << 1) - 1) << 16; /* <= {1,3,5,7} << 16 */
2582
2583- *pMiniCtl |= ((d << 1) - 1) << 16; /* <= {1,3,5,7} << 16 */
2584+ *pHQVfilterCtl |= HQVfilter[d];
2585+ /* *pHQVminiCtl |= HQVmini[d]; */
2586+ *pHQVminiCtl |= HQV_VDEBLOCK_FILTER;
2587
2588- *pHQVfilterCtl |= HQVfilter[d];
2589- /* *pHQVminiCtl |= HQVmini[d]; */
2590- *pHQVminiCtl |= HQV_VDEBLOCK_FILTER;
2591+ /* Scale to arbitrary size, on top of previous scaling by (1 << d). */
2592
2593- /* Scale to arbitrary size, on top of previous scaling by (1 << d). */
2594-
2595- if (sh1 < dstHeight) {
2596- tmp = sh1 * 0x0400 / dstHeight;
2597- *pZoomCtl |= ((tmp & 0x3ff) | V1_Y_ZOOM_ENABLE);
2598- *pMiniCtl |= V1_Y_INTERPOLY | V1_YCBCR_INTERPOLY;
2599- }
2600+ if (sh1 < dstHeight) {
2601+ tmp = sh1 * 0x0400 / dstHeight;
2602+ *pZoomCtl |= ((tmp & 0x3ff) | V1_Y_ZOOM_ENABLE);
2603+ *pMiniCtl |= V1_Y_INTERPOLY | V1_YCBCR_INTERPOLY;
2604+ }
2605+ }
2606 }
2607
2608 return zoom_ok;
2609@@ -1488,6 +1586,7 @@ SetColorKey(VIAPtr pVia, unsigned long videoFlag,
2610
2611 if (videoFlag & VIDEO_1_INUSE) {
2612 SaveVideoRegister(pVia, V_COLOR_KEY, keyLow);
2613+ SaveVideoRegister(pVia, SND_COLOR_KEY, keyLow);
2614 } else {
2615 if (pVia->HWDiff.dwSupportTwoColorKey) /*CLE_C0 */
2616 SaveVideoRegister(pVia, V3_COLOR_KEY, keyLow);
2617@@ -1561,8 +1660,9 @@ SetHQVFetch(VIAPtr pVia, CARD32 srcFetch, unsigned
2618 srcFetch >>= 3; /* fetch unit is 8 bytes */
2619 }
2620
2621- SaveVideoRegister(pVia, HQV_SRC_FETCH_LINE + proReg,
2622- ((srcFetch - 1) << 16) | (srcHeight - 1));
2623+ if (pVia->ChipId != PCI_CHIP_VT3409)
2624+ SaveVideoRegister(pVia, HQV_SRC_FETCH_LINE + proReg,
2625+ ((srcFetch - 1) << 16) | (srcHeight - 1));
2626 }
2627
2628 static void
2629@@ -1713,13 +1813,14 @@ Upd_Video(ScrnInfoPtr pScrn, unsigned long videoFl
2630 unsigned long zoomCtl = 0, miniCtl = 0;
2631 unsigned long hqvCtl = 0;
2632 unsigned long hqvFilterCtl = 0, hqvMiniCtl = 0;
2633+ unsigned long hqvScaleCtlH = 0, hqvScaleCtlV = 0;
2634 unsigned long haveHQVzoomH = 0, haveHQVzoomV = 0;
2635 unsigned long hqvSrcWidth = 0, hqvDstWidth = 0;
2636 unsigned long hqvSrcFetch = 0, hqvOffset = 0;
2637 unsigned long dwOffset = 0, fetch = 0, tmp = 0;
2638 unsigned long proReg = 0;
2639
2640- DBG_DD(ErrorF("videoflag=%p\n", videoFlag));
2641+ DBG_DD(ErrorF("videoflag=%ld\n", videoFlag));
2642
2643 if (pVia->ChipId == PCI_CHIP_VT3259 && !(videoFlag & VIDEO_1_INUSE))
2644 proReg = PRO_HQV1_OFFSET;
2645@@ -1762,16 +1863,16 @@ Upd_Video(ScrnInfoPtr pScrn, unsigned long videoFl
2646
2647 /*
2648 * FIXME:
2649- * Enable video on secondary
2650+ * Enable video on secondary (change Panel to SecondCRTC?)
2651 */
2652 if ((pVia->VideoEngine == VIDEO_ENGINE_CME
2653 || pVia->Chipset == VIA_VM800)
2654 && pVia->pBIOSInfo->Panel->IsActive) {
2655
2656 /* V1_ON_SND_DISPLAY */
2657- vidCtl |= 0x80000000;
2658+ vidCtl |= V1_ON_SND_DISPLAY;
2659 /* SECOND_DISPLAY_COLOR_KEY_ENABLE */
2660- compose |= 0x00010000 | 0x1;
2661+ compose |= SECOND_DISPLAY_COLOR_KEY_ENABLE | 0x1;
2662 }
2663
2664 viaOverlayGetV1V3Format(pVia, (videoFlag & VIDEO_1_INUSE) ? 1 : 3,
2665@@ -1925,7 +2026,7 @@ Upd_Video(ScrnInfoPtr pScrn, unsigned long videoFl
2666
2667 if (!viaOverlayHQVCalcZoomWidth(pVia, videoFlag, srcWidth, dstWidth,
2668 &zoomCtl, &miniCtl, &hqvFilterCtl,
2669- &hqvMiniCtl, &haveHQVzoomH)) {
2670+ &hqvMiniCtl, &hqvScaleCtlH, &haveHQVzoomH)) {
2671 /* Need to scale (minify) too much - can't handle it. */
2672 SetFetch(pVia, videoFlag, fetch);
2673 FireVideoCommand(pVia, videoFlag, compose);
2674@@ -1964,7 +2065,7 @@ Upd_Video(ScrnInfoPtr pScrn, unsigned long videoFl
2675
2676 if (!viaOverlayHQVCalcZoomHeight(pVia, srcHeight, dstHeight, &zoomCtl,
2677 &miniCtl, &hqvFilterCtl, &hqvMiniCtl,
2678- &haveHQVzoomV)) {
2679+ &hqvScaleCtlV, &haveHQVzoomV)) {
2680 /* Need to scale (minify) too much - can't handle it. */
2681 FireVideoCommand(pVia, videoFlag, compose);
2682 FlushVidRegBuffer(pVia);
2683@@ -2008,8 +2109,13 @@ Upd_Video(ScrnInfoPtr pScrn, unsigned long videoFl
2684 hqvFilterCtl &= 0xfffdffff;
2685 SetMiniAndZoom(pVia, videoFlag, 0, 0);
2686 }
2687- SaveVideoRegister(pVia, HQV_MINIFY_CONTROL + proReg, hqvMiniCtl);
2688- SaveVideoRegister(pVia, HQV_FILTER_CONTROL + proReg, hqvFilterCtl);
2689+ if (hwDiff->dwNewScaleCtl) {
2690+ SaveVideoRegister(pVia, HQV_H_SCALE_CONTROL + proReg, hqvScaleCtlH);
2691+ SaveVideoRegister(pVia, HQV_V_SCALE_CONTROL + proReg, hqvScaleCtlV);
2692+ } else {
2693+ SaveVideoRegister(pVia, HQV_MINIFY_CONTROL + proReg, hqvMiniCtl);
2694+ }
2695+ SaveVideoRegister(pVia, HQV_FILTER_CONTROL + proReg, hqvFilterCtl);
2696 } else
2697 SetMiniAndZoom(pVia, videoFlag, miniCtl, zoomCtl);
2698
2699@@ -2022,11 +2128,24 @@ Upd_Video(ScrnInfoPtr pScrn, unsigned long videoFl
2700 miniCtl, compose);
2701
2702 if (pVia->VideoEngine == VIDEO_ENGINE_CME) {
2703- VIDOutD(HQV_SRC_DATA_OFFSET_CONTROL1,0);
2704- VIDOutD(HQV_SRC_DATA_OFFSET_CONTROL3,((pUpdate->SrcRight - 1 ) << 16) | (pUpdate->SrcBottom - 1));
2705+ SaveVideoRegister(pVia, HQV_CME_REG(hwDiff, HQV_SDO_CTRL1),0);
2706+ SaveVideoRegister(pVia, HQV_CME_REG(hwDiff, HQV_SDO_CTRL3),((pUpdate->SrcRight - 1 ) << 16) | (pUpdate->SrcBottom - 1));
2707 if (pVia->Chipset == VIA_VX800 || pVia->Chipset == VIA_VX855) {
2708- VIDOutD(HQV_SRC_DATA_OFFSET_CONTROL2,0);
2709- VIDOutD(HQV_SRC_DATA_OFFSET_CONTROL4,((pUpdate->SrcRight - 1 ) << 16) | (pUpdate->SrcBottom - 1));
2710+ SaveVideoRegister(pVia, HQV_CME_REG(hwDiff, HQV_SDO_CTRL2),0);
2711+ SaveVideoRegister(pVia, HQV_CME_REG(hwDiff, HQV_SDO_CTRL4),((pUpdate->SrcRight - 1 ) << 16) | (pUpdate->SrcBottom - 1));
2712+ if (pVia->Chipset == VIA_VX855) {
2713+ SaveVideoRegister(pVia, HQV_DST_DATA_OFFSET_CTRL1,0);
2714+ SaveVideoRegister(pVia, HQV_DST_DATA_OFFSET_CTRL3,((pUpdate->SrcRight - 1 ) << 16) | (pUpdate->SrcBottom - 1));
2715+ SaveVideoRegister(pVia, HQV_DST_DATA_OFFSET_CTRL2,0);
2716+ SaveVideoRegister(pVia, HQV_DST_DATA_OFFSET_CTRL4,((pUpdate->SrcRight - 1 ) << 16) | (pUpdate->SrcBottom - 1));
2717+ SaveVideoRegister(pVia, HQV_BACKGROUND_DATA_OFFSET,((pUpdate->SrcRight - 1 ) << 16) | (pUpdate->SrcBottom - 1));
2718+ SaveVideoRegister(pVia, HQV_EXTENDED_CONTROL,0);
2719+ /*0x3e0*/
2720+ SaveVideoRegister(pVia, HQV_SUBP_HSCALE_CTRL,0);
2721+ /*0x3e8*/
2722+ SaveVideoRegister(pVia, HQV_SUBP_VSCALE_CTRL,0);
2723+ SaveVideoRegister(pVia, HQV_DEFAULT_VIDEO_COLOR, HQV_FIX_COLOR);
2724+ }
2725 }
2726 }
2727
2728@@ -2062,9 +2181,6 @@ Upd_Video(ScrnInfoPtr pScrn, unsigned long videoFl
2729 usleep(1);
2730 }
2731
2732- if (pVia->VideoEngine == VIDEO_ENGINE_CME)
2733- hqvCtl |= HQV_GEN_IRQ;
2734-
2735 VIDOutD(HQV_CONTROL + proReg, hqvCtl & ~HQV_SW_FLIP);
2736 VIDOutD(HQV_CONTROL + proReg, hqvCtl | HQV_SW_FLIP);
2737
2738Index: src/via_driver.h
2739===================================================================
2740--- a/src/via_driver.h (.../tags/release_0_2_904) (revision 916)
2741+++ b/src/via_driver.h (.../trunk) (revision 916)
2742@@ -127,9 +127,10 @@ typedef struct {
2743 CARD8 SR27, SR28, SR29, SR2A,SR2B,SR2C,SR2D,SR2E;
2744 CARD8 SR2F, SR30, SR31, SR32,SR33,SR34,SR40,SR41;
2745 CARD8 SR42, SR43, SR44, SR45,SR46,SR47,SR48,SR49;
2746- CARD8 SR4A, SR4B, SR4C;
2747+ CARD8 SR4A, SR4B, SR4C, SR4D;
2748
2749 /* extended CRTC registers */
2750+ CARD8 CR0C, CR0D;
2751 CARD8 CR13, CR30, CR31, CR32, CR33, CR34, CR35, CR36;
2752 CARD8 CR37, CR38, CR39, CR3A, CR40, CR41, CR42, CR43;
2753 CARD8 CR44, CR45, CR46, CR47, CR48, CR49, CR4A;
2754@@ -142,7 +143,7 @@ typedef struct {
2755 } VIARegRec, *VIARegPtr;
2756
2757 /*
2758- * varables that need to be shared among different screens.
2759+ * variables that need to be shared among different screens.
2760 */
2761 typedef struct {
2762 Bool b3DRegsInitialized;
2763@@ -285,6 +286,7 @@ typedef struct _VIA {
2764 Bool agpDMA;
2765 Bool nPOT[VIA_NUM_TEXUNITS];
2766 const unsigned *TwodRegs;
2767+ const unsigned *HqvCmeRegs;
2768 ExaDriverPtr exaDriverPtr;
2769 ExaOffscreenArea *exa_scratch;
2770 unsigned int exa_scratch_next;
2771@@ -412,16 +414,18 @@ typedef struct _VIA {
2772 void *cursorMap;
2773 CARD32 cursorOffset;
2774
2775+ CARD8 I2CDevices; /* Option */
2776+
2777 #ifdef HAVE_DEBUG
2778 Bool disableXvBWCheck;
2779 Bool DumpVGAROM;
2780 Bool PrintVGARegs;
2781 Bool PrintTVRegs;
2782 Bool I2CScan;
2783+#endif /* HAVE_DEBUG */
2784
2785 Bool UseLegacyModeSwitch ;
2786 video_via_regs* VideoRegs ;
2787-#endif /* HAVE_DEBUG */
2788 } VIARec, *VIAPtr;
2789
2790 #define VIAPTR(p) ((VIAPtr)((p)->driverPrivate))
2791@@ -433,7 +437,7 @@ typedef struct
2792 Bool HasSecondary;
2793 Bool BypassSecondary;
2794 /*These two registers are used to make sure the CRTC2 is
2795- retored before CRTC_EXT, otherwise it could lead to blank screen.*/
2796+ restored before CRTC_EXT, otherwise it could lead to blank screen.*/
2797 Bool IsSecondaryRestored;
2798 Bool RestorePrimary;
2799
2800Index: src/via_bios.h
2801===================================================================
2802--- a/src/via_bios.h (.../tags/release_0_2_904) (revision 916)
2803+++ b/src/via_bios.h (.../trunk) (revision 916)
2804@@ -82,6 +82,11 @@
2805 #define VIA_DEVICE_TV 0x04
2806 #define VIA_DEVICE_DFP 0x08
2807
2808+#define VIA_I2C_NONE 0x00
2809+#define VIA_I2C_BUS1 0x01
2810+#define VIA_I2C_BUS2 0x02
2811+#define VIA_I2C_BUS3 0x04
2812+
2813 /* System Memory CLK */
2814 #define VIA_MEM_SDR66 0x00
2815 #define VIA_MEM_SDR100 0x01
2816@@ -92,7 +97,9 @@
2817 #define VIA_MEM_DDR400 0x06
2818 #define VIA_MEM_DDR533 0x07
2819 #define VIA_MEM_DDR667 0x08
2820-#define VIA_MEM_END 0x09
2821+#define VIA_MEM_DDR800 0x09
2822+#define VIA_MEM_DDR1066 0x0A
2823+#define VIA_MEM_END 0x0B
2824 #define VIA_MEM_NONE 0xFF
2825
2826 /* Digital Output Bus Width */
2827Index: src/via_swov.h
2828===================================================================
2829--- a/src/via_swov.h (.../tags/release_0_2_904) (revision 916)
2830+++ b/src/via_swov.h (.../trunk) (revision 916)
2831@@ -53,7 +53,7 @@ typedef struct __VIAHWDiff
2832 {
2833 unsigned long dwThreeHQVBuffer; /* Use Three HQV Buffers */
2834 /* unsigned long dwV3SrcHeightSetting; *//* Set Video Source Width and Height */
2835- /* unsigned long dwSupportExtendFIFO; *//* Support Extand FIFO */
2836+ /* unsigned long dwSupportExtendFIFO; *//* Support Extend FIFO */
2837 unsigned long dwHQVFetchByteUnit; /* HQV Fetch Count unit is byte */
2838 unsigned long dwHQVInitPatch; /* Initialize HQV Engine 2 times */
2839 /*unsigned long dwSupportV3Gamma; *//* Support V3 Gamma */
2840@@ -73,6 +73,8 @@ typedef struct __VIAHWDiff
2841 /*unsigned long dwV3FIFOPatch; *//* For CLE V3 FIFO Bug (srcWidth <= 8) */
2842 unsigned long dwSupportTwoColorKey; /* Support two color key */
2843 /* unsigned long dwCxColorSpace; *//* CLE_Cx ColorSpace */
2844+ unsigned dwNewScaleCtl; /* Use new HQV scale engine code */
2845+ const unsigned *HQVCmeRegs; /* Which set of CME regs to use for newer chipsets */
2846 } VIAHWDiff;
2847
2848 void VIAVidHWDiffInit(ScrnInfoPtr pScrn);
2849Index: src/via_bandwidth.c
2850===================================================================
2851--- a/src/via_bandwidth.c (.../tags/release_0_2_904) (revision 916)
2852+++ b/src/via_bandwidth.c (.../trunk) (revision 916)
2853@@ -194,6 +194,7 @@ ViaSetPrimaryFIFO(ScrnInfoPtr pScrn, DisplayModePt
2854 else
2855 ViaSeqMask(hwp, 0x22, 0x00, 0x1F); /* 128/4 = overflow = 0 */
2856 break;
2857+ /* PM800/PM880/CN400 */
2858 case VIA_PM800:
2859 hwp->writeSeq(hwp, 0x17, 0x5F); /* 95 */
2860 ViaSeqMask(hwp, 0x16, 0x20, 0xBF); /* 32 */
2861@@ -204,9 +205,10 @@ ViaSetPrimaryFIFO(ScrnInfoPtr pScrn, DisplayModePt
2862 else
2863 ViaSeqMask(hwp, 0x22, 0x1F, 0x1F); /* 31 */
2864 break;
2865+ /* P4M800Pro/VN800/CN700 */
2866 case VIA_VM800:
2867 hwp->writeSeq(hwp, 0x17, 0x2F);
2868- ViaSeqMask(hwp, 0x16, 0x14, 0xBF);
2869+ ViaSeqMask(hwp, 0x16, 0x14, 0xBF); /* 80/4 = 20 = 0x14 */
2870 ViaSeqMask(hwp, 0x18, 0x08, 0xBF);
2871
2872 if ((mode->HDisplay >= 1400) && (pScrn->bitsPerPixel == 32))
2873@@ -215,40 +217,60 @@ ViaSetPrimaryFIFO(ScrnInfoPtr pScrn, DisplayModePt
2874 ViaSeqMask(hwp, 0x22, 0x00, 0x1F);
2875 break;
2876 case VIA_K8M890:
2877- hwp->writeSeq(hwp, 0x16, 0x92);
2878- hwp->writeSeq(hwp, 0x17, 0xB3);
2879- hwp->writeSeq(hwp, 0x18, 0x8A);
2880+ /* depth location: {SR17,0,7} */
2881+ hwp->writeSeq(hwp, 0x17, 0xB3); /* 360/2-1 = 179 = 0xB3 */
2882+ /* Formula (x & 0x3F) | ((x & 0x40) << 1) */
2883+ /* threshold location: {SR16,0,5},{SR16,7,7} */
2884+ ViaSeqMask(hwp, 0x16, 0x92, 0xBF); /* 328/4 = 82 = 0x52 */
2885+ /* high threshold location: {SR18,0,5},{SR18,7,7} */
2886+ ViaSeqMask(hwp, 0x18, 0x8A, 0xBF); /* 296/4 = 74 = 0x4A */
2887+ /* display queue expire num location: {SR22,0,4}. */
2888+ ViaSeqMask(hwp, 0x22, 0x1F, 0x1F); /* 124/4 = 31 = 0x1F */
2889 break;
2890 case VIA_P4M900:
2891- ViaSeqMask(hwp, 0x17, 0x2F, 0xFF);
2892- ViaSeqMask(hwp, 0x16, 0x13, 0x3F);
2893- ViaSeqMask(hwp, 0x16, 0x00, 0x80);
2894- ViaSeqMask(hwp, 0x18, 0x13, 0x3F);
2895- ViaSeqMask(hwp, 0x18, 0x00, 0x80);
2896+ /* location: {SR17,0,7} */
2897+ hwp->writeSeq(hwp, 0x17, 0x2F); /* 96/2-1 = 47 = 0x2F */
2898+ /* location: {SR16,0,5},{SR16,7,7} */
2899+ ViaSeqMask(hwp, 0x16, 0x13, 0xBF); /* 76/4 = 19 = 0x13 */
2900+ /* location: {SR18,0,5},{SR18,7,7} */
2901+ ViaSeqMask(hwp, 0x18, 0x13, 0xBF); /* 76/4 = 19 = 0x13 */
2902+ /* location: {SR22,0,4}. */
2903+ ViaSeqMask(hwp, 0x22, 0x08, 0x1F); /* 32/4 = 8 = 0x08 */
2904 break;
2905 case VIA_P4M890:
2906- hwp->writeSeq(hwp, 0x16, 0x13);
2907- hwp->writeSeq(hwp, 0x17, 0x2F);
2908- hwp->writeSeq(hwp, 0x18, 0x53);
2909- hwp->writeSeq(hwp, 0x22, 0x10);
2910+ hwp->writeSeq(hwp, 0x17, 0x2F); /* 96/2-1 = 47 = 0x2F */
2911+ ViaSeqMask(hwp, 0x16, 0x13, 0xBF); /* 76/4 = 19 = 0x13 */
2912+ ViaSeqMask(hwp, 0x18, 0x10, 0xBF); /* 64/4 = 16 = 0x10 */
2913+ ViaSeqMask(hwp, 0x22, 0x08, 0x1F); /* 32/4 = 8 = 0x08 */
2914 break;
2915 case VIA_CX700:
2916- hwp->writeSeq(hwp, 0x16, 0x26);
2917 hwp->writeSeq(hwp, 0x17, 0x5F);
2918- hwp->writeSeq(hwp, 0x18, 0x66);
2919- hwp->writeSeq(hwp, 0x22, 0x1F);
2920+ ViaSeqMask(hwp, 0x16, 0x20, 0xBF); /* 128/4 = 32 = 0x20 */
2921+ ViaSeqMask(hwp, 0x18, 0x20, 0xBF); /* 128/4 = 32 = 0x20 */
2922+ ViaSeqMask(hwp, 0x22, 0x1F, 0x1F); /* 124/4 = 31 = 0x1F */
2923 break;
2924 case VIA_VX800:
2925- hwp->writeSeq(hwp, 0x16, 0x26); /* 152/4 = 38 */
2926- hwp->writeSeq(hwp, 0x17, 0x5F); /* 192/2-1 = 95 */
2927+ hwp->writeSeq(hwp, 0x17, 0x5F); /* 192/2-1 = 95 = 0x5F */
2928+ hwp->writeSeq(hwp, 0x16, 0x26); /* 152/4 = 38 = 0x26 */
2929 hwp->writeSeq(hwp, 0x18, 0x26); /* 152/4 = 38 */
2930 hwp->writeSeq(hwp, 0x22, 0x10); /* 64/4 = 16 */
2931 break;
2932 case VIA_VX855:
2933- hwp->writeSeq(hwp, 0x16, 0x50); /* 320/4 = 80 */
2934- hwp->writeSeq(hwp, 0x17, 0xC7); /* 400/2-1 = 199 */
2935- hwp->writeSeq(hwp, 0x18, 0x50); /* 320/4 = 80 */
2936- hwp->writeSeq(hwp, 0x22, 0x28); /* 160/4 = 40 */
2937+ hwp->writeSeq(hwp, 0x17, 0xC7); /* 400/2-1 = 199 = 0xC7 */
2938+ /* Formula for {SR16,0,5},{SR16,7,7} is: (0x50 & 0x3F) | ((0x50 & 0x40) << 1) = 0x90 */
2939+ hwp->writeSeq(hwp, 0x16, 0x90); /* 320/4 = 80 = 0x50 */
2940+ /* Formula for {SR18,0,5},{SR18,7,7} is: (0x50 & 0x3F) | ((0x50 & 0x40) << 1) = 0x90 */
2941+ hwp->writeSeq(hwp, 0x18, 0x90); /* 320/4 = 80 = 0x50 */
2942+ hwp->writeSeq(hwp, 0x22, 0x28); /* 160/4 = 40 = 0x28 */
2943+ break;
2944+ case VIA_VX900:
2945+ hwp->writeSeq(hwp, 0x17, 0xC7); /* 400/2-1 = 199 = 0xC7 */
2946+ /* Formula for {SR16,0,5},{SR16,7,7} is: (0x50 & 0x3F) | ((0x50 & 0x40) << 1) = 0x90 */
2947+ hwp->writeSeq(hwp, 0x16, 0x90); /* 320/4 = 80 = 0x50 */
2948+ /* Formula for {SR18,0,5},{SR18,7,7} is: (0x50 & 0x3F) | ((0x50 & 0x40) << 1) = 0x90 */
2949+ hwp->writeSeq(hwp, 0x18, 0x90); /* 320/4 = 80 = 0x50 */
2950+ hwp->writeSeq(hwp, 0x22, 0x28); /* 160/4 = 40 = 0x28 */
2951+ break;
2952 default:
2953 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "ViaSetPrimaryFIFO: "
2954 "Chipset %d not implemented\n", pVia->Chipset);
2955@@ -371,7 +393,38 @@ ViaSetSecondaryFIFO(ScrnInfoPtr pScrn, DisplayMode
2956 ViaCrtcMask(hwp, 0x94, 0x20, 0x7F);
2957 break;
2958 case VIA_P4M890:
2959+ /* depth location: {CR68,4,7},{CR94,7,7},{CR95,7,7} */
2960+ ViaCrtcMask(hwp, 0x68, 0xB0, 0xF0); /* 96/8-1 = 11 = 0x0B */
2961+ ViaCrtcMask(hwp, 0x94, 0x00, 0x80);
2962+ ViaCrtcMask(hwp, 0x95, 0x00, 0x80);
2963+
2964+ /* location: {CR68,0,3},{CR95,4,6} */
2965+ ViaCrtcMask(hwp, 0x68, 0x03, 0x0F); /* 76/4 = 19 = 0x13 */
2966+ ViaCrtcMask(hwp, 0x95, 0x10, 0x70);
2967+
2968+ /* location: {CR92,0,3},{CR95,0,2} */
2969+ ViaCrtcMask(hwp, 0x92, 0x00, 0x0F); /* 64/4 = 16 = 0x10 */
2970+ ViaCrtcMask(hwp, 0x95, 0x01, 0x07);
2971+
2972+ /* location: {CR94,0,6} */
2973+ ViaCrtcMask(hwp, 0x94, 0x08, 0x7F); /* 32/4 = 8 = 0x08 */
2974+ break;
2975 case VIA_K8M890:
2976+ /* Display Queue Depth, location: {CR68,4,7},{CR94,7,7},{CR95,7,7} */
2977+ ViaCrtcMask(hwp, 0x68, 0xC0, 0xF0); /* 360/8-1 = 44 = 0x2C; 0x2C << 4 = 0xC0 */
2978+ ViaCrtcMask(hwp, 0x94, 0x00, 0x80); /* 0x2C << 3 = 0x00 */
2979+ ViaCrtcMask(hwp, 0x95, 0x80, 0x80); /* 0x2C << 2 = 0x80 */
2980+
2981+ /* Display Queue Read Threshold 1, location: {CR68,0,3},{CR95,4,6} */
2982+ ViaCrtcMask(hwp, 0x68, 0x02, 0x0F); /* 328/4 = 82 = 0x52 */
2983+ ViaCrtcMask(hwp, 0x95, 0x50, 0x70);
2984+
2985+ /* location: {CR92,0,3},{CR95,0,2} */
2986+ ViaCrtcMask(hwp, 0x92, 0x0A, 0x0F); /* 296/4 = 74 = 0x4A */
2987+ ViaCrtcMask(hwp, 0x95, 0x04, 0x07); /* 0x4A >> 4 = 0x04 */
2988+
2989+ /* Display Expire Number Bits, location: {CR94,0,6} */
2990+ ViaCrtcMask(hwp, 0x94, 0x1F, 0x7F); /* 124/4 = 31 = 0x1F */
2991 break;
2992 case VIA_P4M900:
2993 ViaCrtcMask(hwp, 0x68, 0xB0, 0xF0);
2994@@ -402,8 +455,8 @@ ViaSetSecondaryFIFO(ScrnInfoPtr pScrn, DisplayMode
2995 break;
2996 case VIA_VX800:
2997 /* {CR68,4,7},{CR94,7,7},{CR95,7,7} : 96/8-1 = 0x0B */
2998- ViaCrtcMask(hwp, 0x68, 0xA0, 0xF0);
2999- ViaCrtcMask(hwp, 0x94, 0x00, 0x80);
3000+ ViaCrtcMask(hwp, 0x68, 0xB0, 0xF0); /* ((0x0B & 0x0F) << 4)) = 0xB0 */
3001+ ViaCrtcMask(hwp, 0x94, 0x00, 0x80); /* ((0x0B & 0x10) << 3)) = 0x00 */
3002 ViaCrtcMask(hwp, 0x95, 0x00, 0x80);
3003 /* {CR68,0,3},{CR95,4,6} : 64/4 = 0x10 */
3004 ViaCrtcMask(hwp, 0x68, 0x04, 0x0F);
3005@@ -418,7 +471,39 @@ ViaSetSecondaryFIFO(ScrnInfoPtr pScrn, DisplayMode
3006 ViaCrtcMask(hwp, 0x94, 0x20, 0x7F);
3007 break;
3008 case VIA_VX855:
3009+ /* {CR68,4,7},{CR94,7,7},{CR95,7,7} : 200/8-1 = 24 = 0x18 */
3010+ ViaCrtcMask(hwp, 0x68, 0x80, 0xF0); /* ((0x18 & 0x0F) << 4)) = 0x80 */
3011+ ViaCrtcMask(hwp, 0x94, 0x80, 0x80); /* ((0x18 & 0x10) << 3)) = 0x80 */
3012+ ViaCrtcMask(hwp, 0x95, 0x00, 0x80); /* ((0x18 & 0x20) << 2)) = 0x00 */
3013+ /* {CR68,0,3},{CR95,4,6} : 160/4 = 0x28 */
3014+ ViaCrtcMask(hwp, 0x68, 0x08, 0x0F); /* (0x28 & 0x0F) = 0x08 */
3015+ ViaCrtcMask(hwp, 0x95, 0x20, 0x70); /* (0x28 & 0x70) = 0x20 */
3016+ /* {CR92,0,3},{CR95,0,2} : 160/4 = 0x28 */
3017+ ViaCrtcMask(hwp, 0x92, 0x08, 0x08); /* (0x28 & 0x0F) = 0x08 */
3018+ ViaCrtcMask(hwp, 0x95, 0x02, 0x07); /* ((0x28 & 0x70) >> 4)) = 0x02 */
3019+ /* {CR94,0,6} : 320/4 = 0x50 */
3020+ if ((mode->HDisplay >= 1400) && (pScrn->bitsPerPixel == 32))
3021+ ViaCrtcMask(hwp, 0x94, 0x08, 0x7F);
3022+ else
3023+ ViaCrtcMask(hwp, 0x94, 0x08, 0x7F);
3024 break;
3025+ case VIA_VX900:
3026+ /* {CR68,4,7},{CR94,7,7},{CR95,7,7} : 192/8-1 = 23 = 0x17 */
3027+ ViaCrtcMask(hwp, 0x68, 0x70, 0xF0); /* ((0x17 & 0x0F) << 4)) = 0x70 */
3028+ ViaCrtcMask(hwp, 0x94, 0x80, 0x80); /* ((0x17 & 0x10) << 3)) = 0x80 */
3029+ ViaCrtcMask(hwp, 0x95, 0x00, 0x80); /* ((0x17 & 0x20) << 2)) = 0x00 */
3030+ /* {CR68,0,3},{CR95,4,6} : 160/4 = 0x28 */
3031+ ViaCrtcMask(hwp, 0x68, 0x08, 0x0F); /* (0x28 & 0x0F) = 0x08 */
3032+ ViaCrtcMask(hwp, 0x95, 0x20, 0x70); /* (0x28 & 0x70) = 0x20 */
3033+ /* {CR92,0,3},{CR95,0,2} : 160/4 = 0x28 */
3034+ ViaCrtcMask(hwp, 0x92, 0x08, 0x08); /* (0x28 & 0x0F) = 0x08 */
3035+ ViaCrtcMask(hwp, 0x95, 0x02, 0x07); /* ((0x28 & 0x70) >> 4)) = 0x2 */
3036+ /* {CR94,0,6} : 320/4 = 0x50 */
3037+ if ((mode->HDisplay >= 1400) && (pScrn->bitsPerPixel == 32))
3038+ ViaCrtcMask(hwp, 0x94, 0x08, 0x7F);
3039+ else
3040+ ViaCrtcMask(hwp, 0x94, 0x08, 0x7F);
3041+ break;
3042 default:
3043 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "ViaSetSecondaryFIFO: "
3044 "Chipset %d not implemented\n", pVia->Chipset);
3045Index: src/via_accel.c
3046===================================================================
3047--- a/src/via_accel.c (.../tags/release_0_2_904) (revision 916)
3048+++ b/src/via_accel.c (.../trunk) (revision 916)
3049@@ -196,6 +196,7 @@ viaFlushPCI(ViaCommandBuffer * buf)
3050 switch (pVia->Chipset) {
3051 case VIA_VX800:
3052 case VIA_VX855:
3053+ case VIA_VX900:
3054 while ((VIAGETREG(VIA_REG_STATUS) &
3055 (VIA_CMD_RGTR_BUSY_H5 | VIA_2D_ENG_BUSY_H5))
3056 && (loop++ < MAXLOOP)) ;
3057@@ -287,7 +288,7 @@ viaSetupCBuffer(ScrnInfoPtr pScrn, ViaCommandBuffe
3058
3059 buf->pScrn = pScrn;
3060 buf->bufSize = ((size == 0) ? VIA_DMASIZE : size) >> 2;
3061- buf->buf = (CARD32 *) xcalloc(buf->bufSize, sizeof(CARD32));
3062+ buf->buf = (CARD32 *) calloc(buf->bufSize, sizeof(CARD32));
3063 if (!buf->buf)
3064 return BadAlloc;
3065 buf->waitFlags = 0;
3066@@ -312,7 +313,7 @@ void
3067 viaTearDownCBuffer(ViaCommandBuffer * buf)
3068 {
3069 if (buf && buf->buf)
3070- xfree(buf->buf);
3071+ free(buf->buf);
3072 buf->buf = NULL;
3073 }
3074
3075@@ -417,6 +418,9 @@ viaDisableVQ(ScrnInfoPtr pScrn)
3076 switch (pVia->Chipset) {
3077 case VIA_K8M890:
3078 case VIA_P4M900:
3079+ case VIA_VX800:
3080+ case VIA_VX855:
3081+ case VIA_VX900:
3082 VIASETREG(0x41c, 0x00100000);
3083 VIASETREG(0x420, 0x74301000);
3084 break;
3085@@ -472,16 +476,25 @@ viaInitialize2DEngine(ScrnInfoPtr pScrn)
3086 VIASETREG(i, 0x0);
3087 }
3088
3089- if (pVia->Chipset == VIA_VX800 || pVia->Chipset == VIA_VX855) {
3090- for (i = 0x44; i < 0x5c; i += 4) {
3091+ if (pVia->Chipset == VIA_VX800 ||
3092+ pVia->Chipset == VIA_VX855 ||
3093+ pVia->Chipset == VIA_VX900) {
3094+ for (i = 0x44; i <= 0x5c; i += 4) {
3095 VIASETREG(i, 0x0);
3096 }
3097 }
3098
3099+ if (pVia->Chipset == VIA_VX900)
3100+ {
3101+ /*410 redefine 0x30 34 38*/
3102+ VIASETREG(0x60, 0x0); /*already useable here*/
3103+ }
3104+
3105 /* Make the VIA_REG() macro magic work */
3106 switch (pVia->Chipset) {
3107 case VIA_VX800:
3108 case VIA_VX855:
3109+ case VIA_VX900:
3110 pVia->TwodRegs = via_2d_regs_m1;
3111 break;
3112 default:
3113@@ -492,6 +505,9 @@ viaInitialize2DEngine(ScrnInfoPtr pScrn)
3114 switch (pVia->Chipset) {
3115 case VIA_K8M890:
3116 case VIA_P4M900:
3117+ case VIA_VX800:
3118+ case VIA_VX855:
3119+ case VIA_VX900:
3120 viaInitPCIe(pVia);
3121 break;
3122 default:
3123@@ -503,6 +519,9 @@ viaInitialize2DEngine(ScrnInfoPtr pScrn)
3124 switch (pVia->Chipset) {
3125 case VIA_K8M890:
3126 case VIA_P4M900:
3127+ case VIA_VX800:
3128+ case VIA_VX855:
3129+ case VIA_VX900:
3130 viaEnablePCIeVQ(pVia);
3131 break;
3132 default:
3133@@ -530,6 +549,7 @@ viaAccelSync(ScrnInfoPtr pScrn)
3134 switch (pVia->Chipset) {
3135 case VIA_VX800:
3136 case VIA_VX855:
3137+ case VIA_VX900:
3138 while ((VIAGETREG(VIA_REG_STATUS) &
3139 (VIA_CMD_RGTR_BUSY_H5 | VIA_2D_ENG_BUSY_H5 | VIA_3D_ENG_BUSY_H5))
3140 && (loop++ < MAXLOOP)) ;
3141@@ -590,7 +610,9 @@ viaPitchHelper(VIAPtr pVia, unsigned dstPitch, uns
3142 unsigned val = (dstPitch >> 3) << 16 | (srcPitch >> 3);
3143 RING_VARS;
3144
3145- if (pVia->Chipset != VIA_VX800 && pVia->Chipset != VIA_VX855) {
3146+ if (pVia->Chipset != VIA_VX800 &&
3147+ pVia->Chipset != VIA_VX855 &&
3148+ pVia->Chipset != VIA_VX900) {
3149 val |= VIA_PITCH_ENABLE;
3150 }
3151 OUT_RING_H1(VIA_REG(pVia, PITCH), val);
3152@@ -759,6 +781,7 @@ viaSetupForScreenToScreenCopy(ScrnInfoPtr pScrn, i
3153 tdc->cmd = cmd;
3154 viaAccelTransparentHelper(pVia, (trans_color != -1) ? 0x4000 : 0x0000,
3155 trans_color, FALSE);
3156+ ADVANCE_RING;
3157 }
3158
3159 static void
3160@@ -796,6 +819,7 @@ viaSetupForSolidFill(ScrnInfoPtr pScrn, int color,
3161 tdc->cmd = VIA_GEC_BLT | VIA_GEC_FIXCOLOR_PAT | VIAACCELPATTERNROP(rop);
3162 tdc->fgColor = color;
3163 viaAccelTransparentHelper(pVia, 0x00, 0x00, FALSE);
3164+ ADVANCE_RING;
3165 }
3166
3167 static void
3168@@ -852,6 +876,7 @@ viaSetupForMono8x8PatternFill(ScrnInfoPtr pScrn, i
3169 tdc->pattern0 = pattern0;
3170 tdc->pattern1 = pattern1;
3171 viaAccelTransparentHelper(pVia, 0x00, 0x00, FALSE);
3172+ ADVANCE_RING;
3173 }
3174
3175 static void
3176@@ -901,6 +926,7 @@ viaSetupForColor8x8PatternFill(ScrnInfoPtr pScrn,
3177 tdc->patternAddr = (patternx * pVia->Bpp + patterny * pVia->Bpl);
3178 viaAccelTransparentHelper(pVia, (trans_color != -1) ? 0x4000 : 0x0000,
3179 trans_color, FALSE);
3180+ ADVANCE_RING;
3181 }
3182
3183 static void
3184@@ -962,9 +988,9 @@ viaSetupForCPUToScreenColorExpandFill(ScrnInfoPtr
3185 tdc->fgColor = fg;
3186 tdc->bgColor = bg;
3187
3188+ viaAccelTransparentHelper(pVia, 0x0, 0x0, FALSE);
3189+
3190 ADVANCE_RING;
3191-
3192- viaAccelTransparentHelper(pVia, 0x0, 0x0, FALSE);
3193 }
3194
3195 static void
3196@@ -991,7 +1017,7 @@ viaSubsequentScanlineCPUToScreenColorExpandFill(Sc
3197 pScrn->fbOffset + sub * pVia->Bpl, tdc->mode,
3198 pVia->Bpl, pVia->Bpl, tdc->cmd);
3199
3200- viaFlushPCI(cb);
3201+ ADVANCE_RING;
3202 viaDisableClipping(pScrn);
3203 }
3204
3205@@ -1005,9 +1031,9 @@ viaSetupForImageWrite(ScrnInfoPtr pScrn, int rop,
3206 RING_VARS;
3207
3208 tdc->cmd = VIA_GEC_BLT | VIA_GEC_SRC_SYS | VIAACCELCOPYROP(rop);
3209- ADVANCE_RING;
3210 viaAccelTransparentHelper(pVia, (trans_color != -1) ? 0x4000 : 0x0000,
3211 trans_color, FALSE);
3212+ ADVANCE_RING;
3213 }
3214
3215 static void
3216@@ -1030,7 +1056,7 @@ viaSubsequentImageWriteRect(ScrnInfoPtr pScrn, int
3217 pScrn->fbOffset + pVia->Bpl * sub, tdc->mode,
3218 pVia->Bpl, pVia->Bpl, tdc->cmd);
3219
3220- viaFlushPCI(cb);
3221+ ADVANCE_RING;
3222 viaDisableClipping(pScrn);
3223 }
3224
3225@@ -1052,6 +1078,7 @@ viaSetupForSolidLine(ScrnInfoPtr pScrn, int color,
3226 OUT_RING_H1(VIA_REG(pVia, GEMODE), tdc->mode);
3227 OUT_RING_H1(VIA_REG(pVia, MONOPAT0), 0xFF);
3228 OUT_RING_H1(VIA_REG(pVia, MONOPATFGC), tdc->fgColor);
3229+ ADVANCE_RING;
3230 }
3231
3232 static void
3233@@ -1189,6 +1216,7 @@ viaSetupForDashedLine(ScrnInfoPtr pScrn, int fg, i
3234 OUT_RING_H1(VIA_REG(pVia, MONOPATFGC), tdc->fgColor);
3235 OUT_RING_H1(VIA_REG(pVia, MONOPATBGC), tdc->bgColor);
3236 OUT_RING_H1(VIA_REG(pVia, MONOPAT0), tdc->pattern0);
3237+ ADVANCE_RING;
3238 }
3239
3240 static void
3241@@ -1210,7 +1238,8 @@ viaInitXAA(ScreenPtr pScreen)
3242
3243 /* General acceleration flags. */
3244 xaaptr->Flags = (PIXMAP_CACHE |
3245- OFFSCREEN_PIXMAPS | LINEAR_FRAMEBUFFER |
3246+ OFFSCREEN_PIXMAPS |
3247+ LINEAR_FRAMEBUFFER |
3248 MICROSOFT_ZERO_LINE_BIAS | 0);
3249
3250 if (pScrn->bitsPerPixel == 8)
3251@@ -1218,24 +1247,29 @@ viaInitXAA(ScreenPtr pScreen)
3252
3253 xaaptr->SetClippingRectangle = viaSetClippingRectangle;
3254 xaaptr->DisableClipping = viaDisableClipping;
3255- xaaptr->ClippingFlags = (HARDWARE_CLIP_SOLID_FILL |
3256- HARDWARE_CLIP_SOLID_LINE |
3257- HARDWARE_CLIP_DASHED_LINE |
3258- HARDWARE_CLIP_SCREEN_TO_SCREEN_COPY |
3259+ xaaptr->ClippingFlags = (HARDWARE_CLIP_SCREEN_TO_SCREEN_COPY |
3260 HARDWARE_CLIP_MONO_8x8_FILL |
3261 HARDWARE_CLIP_COLOR_8x8_FILL |
3262 HARDWARE_CLIP_SCREEN_TO_SCREEN_COLOR_EXPAND | 0);
3263
3264+ if (pVia->Chipset != VIA_VX855 && pVia->Chipset != VIA_VX900)
3265+ xaaptr->ClippingFlags |= (HARDWARE_CLIP_SOLID_FILL |
3266+ HARDWARE_CLIP_SOLID_LINE |
3267+ HARDWARE_CLIP_DASHED_LINE);
3268+
3269 xaaptr->Sync = viaAccelSync;
3270
3271+ /* ScreenToScreen copies */
3272 xaaptr->SetupForScreenToScreenCopy = viaSetupForScreenToScreenCopy;
3273 xaaptr->SubsequentScreenToScreenCopy = viaSubsequentScreenToScreenCopy;
3274 xaaptr->ScreenToScreenCopyFlags = NO_PLANEMASK | ROP_NEEDS_SOURCE;
3275
3276+ /* Solid filled rectangles */
3277 xaaptr->SetupForSolidFill = viaSetupForSolidFill;
3278 xaaptr->SubsequentSolidFillRect = viaSubsequentSolidFillRect;
3279 xaaptr->SolidFillFlags = NO_PLANEMASK | ROP_NEEDS_SOURCE;
3280
3281+ /* Mono 8x8 pattern fills */
3282 xaaptr->SetupForMono8x8PatternFill = viaSetupForMono8x8PatternFill;
3283 xaaptr->SubsequentMono8x8PatternFillRect =
3284 viaSubsequentMono8x8PatternFillRect;
3285@@ -1244,6 +1278,7 @@ viaInitXAA(ScreenPtr pScreen)
3286 HARDWARE_PATTERN_PROGRAMMED_ORIGIN |
3287 BIT_ORDER_IN_BYTE_MSBFIRST | 0);
3288
3289+ /* Color 8x8 pattern fills */
3290 xaaptr->SetupForColor8x8PatternFill = viaSetupForColor8x8PatternFill;
3291 xaaptr->SubsequentColor8x8PatternFillRect =
3292 viaSubsequentColor8x8PatternFillRect;
3293@@ -1252,12 +1287,14 @@ viaInitXAA(ScreenPtr pScreen)
3294 HARDWARE_PATTERN_PROGRAMMED_BITS |
3295 HARDWARE_PATTERN_PROGRAMMED_ORIGIN | 0);
3296
3297+ /* Solid lines */
3298 xaaptr->SetupForSolidLine = viaSetupForSolidLine;
3299 xaaptr->SubsequentSolidTwoPointLine = viaSubsequentSolidTwoPointLine;
3300 xaaptr->SubsequentSolidHorVertLine = viaSubsequentSolidHorVertLine;
3301 xaaptr->SolidBresenhamLineErrorTermBits = 14;
3302 xaaptr->SolidLineFlags = NO_PLANEMASK | ROP_NEEDS_SOURCE;
3303
3304+ /* Dashed line */
3305 xaaptr->SetupForDashedLine = viaSetupForDashedLine;
3306 xaaptr->SubsequentDashedTwoPointLine = viaSubsequentDashedTwoPointLine;
3307 xaaptr->DashPatternMaxLength = 8;
3308@@ -1266,49 +1303,50 @@ viaInitXAA(ScreenPtr pScreen)
3309 LINE_PATTERN_POWER_OF_2_ONLY |
3310 LINE_PATTERN_MSBFIRST_LSBJUSTIFIED | 0);
3311
3312+ /* CPU to Screen color expansion */
3313 xaaptr->ScanlineCPUToScreenColorExpandFillFlags = NO_PLANEMASK |
3314- CPU_TRANSFER_PAD_DWORD |
3315- SCANLINE_PAD_DWORD |
3316- BIT_ORDER_IN_BYTE_MSBFIRST |
3317- LEFT_EDGE_CLIPPING | ROP_NEEDS_SOURCE | 0;
3318+ CPU_TRANSFER_PAD_DWORD |
3319+ SCANLINE_PAD_DWORD |
3320+ BIT_ORDER_IN_BYTE_MSBFIRST |
3321+ LEFT_EDGE_CLIPPING |
3322+ ROP_NEEDS_SOURCE | 0;
3323
3324 xaaptr->SetupForScanlineCPUToScreenColorExpandFill =
3325 viaSetupForCPUToScreenColorExpandFill;
3326 xaaptr->SubsequentScanlineCPUToScreenColorExpandFill =
3327 viaSubsequentScanlineCPUToScreenColorExpandFill;
3328 xaaptr->ColorExpandBase = pVia->BltBase;
3329- xaaptr->ColorExpandRange = VIA_MMIO_BLTSIZE;
3330+ if (pVia->Chipset == VIA_VX800 ||
3331+ pVia->Chipset == VIA_VX855 ||
3332+ pVia->Chipset == VIA_VX900)
3333+ xaaptr->ColorExpandRange = VIA_MMIO_BLTSIZE;
3334+ else
3335+ xaaptr->ColorExpandRange = (64 * 1024);
3336
3337+ /* ImageWrite */
3338 xaaptr->ImageWriteFlags = (NO_PLANEMASK |
3339 CPU_TRANSFER_PAD_DWORD |
3340 SCANLINE_PAD_DWORD |
3341 BIT_ORDER_IN_BYTE_MSBFIRST |
3342- LEFT_EDGE_CLIPPING | ROP_NEEDS_SOURCE | 0);
3343- // SYNC_AFTER_IMAGE_WRITE | 0);
3344+ LEFT_EDGE_CLIPPING |
3345+ ROP_NEEDS_SOURCE |
3346+ NO_GXCOPY | 0);
3347
3348 /*
3349 * Most Unichromes are much faster using processor-to-framebuffer writes
3350 * than when using the 2D engine for this.
3351- * test with x11perf -shmput500!
3352+ * test with "x11perf -shmput500"
3353+ * Example: K8M890 chipset; with GPU=86.3/sec; without GPU=132.0/sec
3354+ * TODO Check speed for other chipsets
3355 */
3356
3357- switch (pVia->Chipset) {
3358- case VIA_K8M800:
3359- case VIA_K8M890:
3360- case VIA_P4M900:
3361- case VIA_VX800:
3362- case VIA_VX855:
3363- break;
3364- default:
3365- xaaptr->ImageWriteFlags |= NO_GXCOPY;
3366- break;
3367- }
3368-
3369 xaaptr->SetupForImageWrite = viaSetupForImageWrite;
3370 xaaptr->SubsequentImageWriteRect = viaSubsequentImageWriteRect;
3371 xaaptr->ImageWriteBase = pVia->BltBase;
3372
3373- if (pVia->Chipset == VIA_VX800 || pVia->Chipset == VIA_VX855)
3374+ if (pVia->Chipset == VIA_VX800 ||
3375+ pVia->Chipset == VIA_VX855 ||
3376+ pVia->Chipset == VIA_VX900)
3377 xaaptr->ImageWriteRange = VIA_MMIO_BLTSIZE;
3378 else
3379 xaaptr->ImageWriteRange = (64 * 1024);
3380@@ -2344,7 +2382,7 @@ viaInitExa(ScreenPtr pScreen)
3381 }
3382
3383 if (!exaDriverInit(pScreen, pExa)) {
3384- xfree(pExa);
3385+ free(pExa);
3386 return NULL;
3387 }
3388
3389@@ -2354,7 +2392,7 @@ viaInitExa(ScreenPtr pScreen)
3390
3391
3392 /*
3393- * Acceleration initializatuon function. Sets up offscreen memory disposition,
3394+ * Acceleration initialization function. Sets up offscreen memory disposition,
3395 * and initializes engines and acceleration method.
3396 */
3397 Bool
3398@@ -2542,7 +2580,7 @@ viaExitAccel(ScreenPtr pScreen)
3399 }
3400 }
3401 if (pVia->dBounce)
3402- xfree(pVia->dBounce);
3403+ free(pVia->dBounce);
3404 #endif /* XF86DRI */
3405 if (pVia->scratchAddr) {
3406 exaOffscreenFree(pScreen, pVia->scratchFBBuffer);
3407@@ -2551,7 +2589,7 @@ viaExitAccel(ScreenPtr pScreen)
3408 if (pVia->exaDriverPtr) {
3409 exaDriverFini(pScreen);
3410 }
3411- xfree(pVia->exaDriverPtr);
3412+ free(pVia->exaDriverPtr);
3413 pVia->exaDriverPtr = NULL;
3414 return;
3415 }
3416@@ -2577,7 +2615,7 @@ viaFinishInitAccel(ScreenPtr pScreen)
3417
3418 if (pVia->directRenderingEnabled && pVia->useEXA) {
3419
3420- pVia->dBounce = xcalloc(VIA_DMA_DL_SIZE * 2, 1);
3421+ pVia->dBounce = calloc(VIA_DMA_DL_SIZE * 2, 1);
3422
3423 if (!pVia->IsPCI) {
3424
3425Index: src/via_vt162x.c
3426===================================================================
3427--- a/src/via_vt162x.c (.../tags/release_0_2_904) (revision 916)
3428+++ b/src/via_vt162x.c (.../trunk) (revision 916)
3429@@ -41,30 +41,42 @@ ViaSetTVClockSource(ScrnInfoPtr pScrn)
3430 VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo;
3431 vgaHWPtr hwp = VGAHWPTR(pScrn);
3432
3433- /* External TV: */
3434- switch(pVia->Chipset) {
3435- case VIA_CX700:
3436- case VIA_VX800:
3437- if (pBIOSInfo->FirstCRTC->IsActive) {
3438- if(pBIOSInfo->TVDIPort == VIA_DI_PORT_DVP1)
3439- ViaCrtcMask(hwp, 0x6C, 0xB0, 0xF0);
3440- else if(pBIOSInfo->TVDIPort == VIA_DI_PORT_DVP0)
3441- ViaCrtcMask(hwp, 0x6C, 0x90, 0xF0);
3442- } else {
3443- /* IGA2 */
3444- if(pBIOSInfo->TVDIPort == VIA_DI_PORT_DVP1)
3445- ViaCrtcMask(hwp, 0x6C, 0x0B, 0x0F);
3446- else if(pBIOSInfo->TVDIPort == VIA_DI_PORT_DVP0)
3447- ViaCrtcMask(hwp, 0x6C, 0x09, 0x0F);
3448+ switch(pBIOSInfo->TVEncoder) {
3449+ case VIA_VT1625:
3450+ /* External TV: */
3451+ switch(pVia->Chipset) {
3452+ case VIA_CX700:
3453+ case VIA_VX800:
3454+ case VIA_VX855:
3455+ if (pBIOSInfo->FirstCRTC->IsActive) {
3456+ if(pBIOSInfo->TVDIPort == VIA_DI_PORT_DVP1)
3457+ ViaCrtcMask(hwp, 0x6C, 0xB0, 0xF0);
3458+ else if(pBIOSInfo->TVDIPort == VIA_DI_PORT_DVP0)
3459+ ViaCrtcMask(hwp, 0x6C, 0x90, 0xF0);
3460+ } else {
3461+ /* IGA2 */
3462+ if(pBIOSInfo->TVDIPort == VIA_DI_PORT_DVP1)
3463+ ViaCrtcMask(hwp, 0x6C, 0x0B, 0x0F);
3464+ else if(pBIOSInfo->TVDIPort == VIA_DI_PORT_DVP0)
3465+ ViaCrtcMask(hwp, 0x6C, 0x09, 0x0F);
3466+ }
3467+ break;
3468+ default:
3469+ if (pBIOSInfo->FirstCRTC->IsActive)
3470+ ViaCrtcMask(hwp, 0x6C, 0x21, 0x21);
3471+ else
3472+ ViaCrtcMask(hwp, 0x6C, 0xA1, 0xA1);
3473+ break;
3474 }
3475 break;
3476 default:
3477 if (pBIOSInfo->FirstCRTC->IsActive)
3478- ViaCrtcMask(hwp, 0x6C, 0x21, 0x21);
3479+ ViaCrtcMask(hwp, 0x6C, 0x50, 0xF0);
3480 else
3481- ViaCrtcMask(hwp, 0x6C, 0xA1, 0xA1);
3482+ ViaCrtcMask(hwp, 0x6C, 0x05, 0x0F);
3483 break;
3484 }
3485+
3486 }
3487
3488 static void
3489Index: src/via_vbe.c
3490===================================================================
3491--- a/src/via_vbe.c (.../tags/release_0_2_904) (revision 916)
3492+++ b/src/via_vbe.c (.../trunk) (revision 916)
3493@@ -230,7 +230,7 @@ ViaVbeSetMode(ScrnInfoPtr pScrn, DisplayModePtr pM
3494 /* Some cards do not like setting the clock. */
3495 xf86ErrorF("...but worked OK without customized "
3496 "refresh and dotclock.\n");
3497- xfree(data->block);
3498+ free(data->block);
3499 data->block = NULL;
3500 data->mode &= ~(1 << 11);
3501 } else {
3502@@ -322,7 +322,7 @@ ViaVbeSaveRestore(ScrnInfoPtr pScrn, vbeSaveRestor
3503 && (function == MODE_SAVE)) {
3504 /* Do not rely on the memory not being touched. */
3505 if (pVia->vbeMode.pstate == NULL)
3506- pVia->vbeMode.pstate = xalloc(pVia->vbeMode.stateSize);
3507+ pVia->vbeMode.pstate = malloc(pVia->vbeMode.stateSize);
3508 memcpy(pVia->vbeMode.pstate, pVia->vbeMode.state,
3509 pVia->vbeMode.stateSize);
3510 }
3511Index: src/via_xvmc.c
3512===================================================================
3513--- a/src/via_xvmc.c (.../tags/release_0_2_904) (revision 916)
3514+++ b/src/via_xvmc.c (.../trunk) (revision 916)
3515@@ -151,7 +151,7 @@ cleanupViaXvMC(ViaXvMCPtr vXvMC, XF86VideoAdaptorP
3516 for (i = 0; i < VIA_XVMC_MAX_CONTEXTS; ++i) {
3517 vXvMC->contexts[i] = 0;
3518 if (vXvMC->cPrivs[i]) {
3519- xfree(vXvMC->cPrivs[i]);
3520+ free(vXvMC->cPrivs[i]);
3521 vXvMC->cPrivs[i] = 0;
3522 }
3523 }
3524@@ -159,7 +159,7 @@ cleanupViaXvMC(ViaXvMCPtr vXvMC, XF86VideoAdaptorP
3525 for (i = 0; i < VIA_XVMC_MAX_SURFACES; ++i) {
3526 vXvMC->surfaces[i] = 0;
3527 if (vXvMC->sPrivs[i]) {
3528- xfree(vXvMC->sPrivs[i]);
3529+ free(vXvMC->sPrivs[i]);
3530 vXvMC->sPrivs[i] = 0;
3531 }
3532 }
3533@@ -270,7 +270,7 @@ static XF86ImagePtr Via_subpicture_list[2] = {
3534 /*
3535 * Filling in the device dependent adaptor record.
3536 * This is named "VIA Video Overlay" because this code falls under the
3537- * XV extenstion, the name must match or it won't be used.
3538+ * XV extension, the name must match or it won't be used.
3539 *
3540 * For surface and subpicture, see above.
3541 * The function pointers point to functions below.
3542@@ -325,10 +325,11 @@ ViaInitXVMC(ScreenPtr pScreen)
3543
3544 if ((pVia->Chipset == VIA_KM400) ||
3545 (pVia->Chipset == VIA_CX700) ||
3546+ (pVia->Chipset == VIA_K8M890) ||
3547+ (pVia->Chipset == VIA_P4M900) ||
3548 (pVia->Chipset == VIA_VX800) ||
3549 (pVia->Chipset == VIA_VX855) ||
3550- (pVia->Chipset == VIA_K8M890) ||
3551- (pVia->Chipset == VIA_P4M900)) {
3552+ (pVia->Chipset == VIA_VX900)) {
3553 xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
3554 "[XvMC] XvMC is not supported on this chipset.\n");
3555 return;
3556@@ -424,7 +425,7 @@ ViaCleanupXVMC(ScrnInfoPtr pScrn, XF86VideoAdaptor
3557 viaPortPrivPtr pPriv = XvAdaptors[i]->pPortPrivates[j].ptr;
3558
3559 if (pPriv->xvmc_priv)
3560- xfree(pPriv->xvmc_priv);
3561+ free(pPriv->xvmc_priv);
3562 }
3563 }
3564 pVia->XvMCEnabled = 0;
3565@@ -460,7 +461,7 @@ ViaXvMCCreateContext(ScrnInfoPtr pScrn, XvMCContex
3566 return BadAlloc;
3567 }
3568
3569- *priv = xcalloc(1, sizeof(ViaXvMCCreateContextRec));
3570+ *priv = calloc(1, sizeof(ViaXvMCCreateContextRec));
3571 contextRec = (ViaXvMCCreateContextRec *) * priv;
3572
3573 if (!*priv) {
3574@@ -475,12 +476,12 @@ ViaXvMCCreateContext(ScrnInfoPtr pScrn, XvMCContex
3575 break;
3576 }
3577
3578- cPriv = (ViaXvMCContextPriv *) xcalloc(1, sizeof(ViaXvMCContextPriv));
3579+ cPriv = (ViaXvMCContextPriv *) calloc(1, sizeof(ViaXvMCContextPriv));
3580
3581 if (!cPriv) {
3582 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
3583 "[XvMC] ViaXvMCCreateContext: Unable to allocate memory!\n");
3584- xfree(*priv);
3585+ free(*priv);
3586 *num_priv = 0;
3587 return BadAlloc;
3588 }
3589@@ -532,7 +533,7 @@ ViaXvMCCreateSurface(ScrnInfoPtr pScrn, XvMCSurfac
3590 return BadAlloc;
3591 }
3592
3593- sPriv = (ViaXvMCSurfacePriv *) xcalloc(1, sizeof(ViaXvMCSurfacePriv));
3594+ sPriv = (ViaXvMCSurfacePriv *) calloc(1, sizeof(ViaXvMCSurfacePriv));
3595
3596 if (!sPriv) {
3597 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
3598@@ -566,13 +567,13 @@ ViaXvMCCreateSurface(ScrnInfoPtr pScrn, XvMCSurfac
3599 #endif
3600 *num_priv = numBuffers + 2;
3601
3602- *priv = (INT32 *) xcalloc(*num_priv, sizeof(INT32));
3603+ *priv = (INT32 *) calloc(*num_priv, sizeof(INT32));
3604
3605 if (!*priv) {
3606 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
3607 "[XvMC] ViaXvMCCreateSurface: Unable to allocate memory!\n");
3608 *num_priv = 0;
3609- xfree(sPriv);
3610+ free(sPriv);
3611 return BadAlloc;
3612 }
3613
3614@@ -588,8 +589,8 @@ ViaXvMCCreateSurface(ScrnInfoPtr pScrn, XvMCSurfac
3615 sPriv->memory_ref.pool = 0;
3616 if (VIAAllocLinear(&(sPriv->memory_ref), pScrn,
3617 numBuffers * bufSize + 32)) {
3618- xfree(*priv);
3619- xfree(sPriv);
3620+ free(*priv);
3621+ free(sPriv);
3622 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "[XvMC] ViaXvMCCreateSurface: "
3623 "Unable to allocate frambuffer memory!\n");
3624 return BadAlloc;
3625@@ -631,7 +632,7 @@ ViaXvMCCreateSubpicture(ScrnInfoPtr pScrn, XvMCSub
3626 return BadAlloc;
3627 }
3628
3629- sPriv = (ViaXvMCSurfacePriv *) xcalloc(1, sizeof(ViaXvMCSurfacePriv));
3630+ sPriv = (ViaXvMCSurfacePriv *) calloc(1, sizeof(ViaXvMCSurfacePriv));
3631
3632 if (!sPriv) {
3633 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "[XvMC] ViaXvMCCreateSubpicture:"
3634@@ -640,13 +641,13 @@ ViaXvMCCreateSubpicture(ScrnInfoPtr pScrn, XvMCSub
3635 return BadAlloc;
3636 }
3637
3638- *priv = (INT32 *) xcalloc(3, sizeof(INT32));
3639+ *priv = (INT32 *) calloc(3, sizeof(INT32));
3640
3641 if (!*priv) {
3642 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "[XvMC] ViaXvMCCreateSubpicture:"
3643 " Unable to allocate memory!\n");
3644 *num_priv = 0;
3645- xfree(sPriv);
3646+ free(sPriv);
3647 return BadAlloc;
3648 }
3649
3650@@ -663,8 +664,8 @@ ViaXvMCCreateSubpicture(ScrnInfoPtr pScrn, XvMCSub
3651 bufSize = size_xx44(ctx->width, ctx->height);
3652 sPriv->memory_ref.pool = 0;
3653 if (VIAAllocLinear(&(sPriv->memory_ref), pScrn, 1 * bufSize + 32)) {
3654- xfree(*priv);
3655- xfree(sPriv);
3656+ free(*priv);
3657+ free(sPriv);
3658 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "[XvMC] ViaXvMCCreateSubpicture:"
3659 " Unable to allocate framebuffer memory!\n");
3660 return BadAlloc;
3661@@ -701,7 +702,7 @@ ViaXvMCDestroyContext(ScrnInfoPtr pScrn, XvMCConte
3662 vx->ctxDisplaying = 0;
3663 }
3664
3665- xfree(vXvMC->cPrivs[i]);
3666+ free(vXvMC->cPrivs[i]);
3667 vXvMC->cPrivs[i] = 0;
3668 vXvMC->nContexts--;
3669 vXvMC->contexts[i] = 0;
3670@@ -736,7 +737,7 @@ ViaXvMCDestroySurface(ScrnInfoPtr pScrn, XvMCSurfa
3671 }
3672
3673 VIAFreeLinear(&(vXvMC->sPrivs[i]->memory_ref));
3674- xfree(vXvMC->sPrivs[i]);
3675+ free(vXvMC->sPrivs[i]);
3676 vXvMC->nSurfaces--;
3677 vXvMC->sPrivs[i] = 0;
3678 vXvMC->surfaces[i] = 0;
3679@@ -778,7 +779,7 @@ ViaXvMCDestroySubpicture(ScrnInfoPtr pScrn, XvMCSu
3680 }
3681
3682 VIAFreeLinear(&(vXvMC->sPrivs[i]->memory_ref));
3683- xfree(vXvMC->sPrivs[i]);
3684+ free(vXvMC->sPrivs[i]);
3685 vXvMC->nSurfaces--;
3686 vXvMC->sPrivs[i] = 0;
3687 vXvMC->surfaces[i] = 0;
3688@@ -828,7 +829,7 @@ viaXvMCInitXv(ScrnInfoPtr pScrn, XF86VideoAdaptorP
3689 for (j = 0; j < XvAdapt->nPorts; ++j) {
3690 pPriv = (viaPortPrivPtr) XvAdapt->pPortPrivates[j].ptr;
3691
3692- if (NULL == (pPriv->xvmc_priv = xcalloc(1, sizeof(ViaXvMCXVPriv))))
3693+ if (NULL == (pPriv->xvmc_priv = calloc(1, sizeof(ViaXvMCXVPriv))))
3694 return BadAlloc;
3695
3696 for (i = 0; i < VIA_NUM_XVMC_ATTRIBUTES; ++i) {
3697Index: src/via_cursor.c
3698===================================================================
3699--- a/src/via_cursor.c (.../tags/release_0_2_904) (revision 916)
3700+++ b/src/via_cursor.c (.../trunk) (revision 916)
3701@@ -98,6 +98,7 @@ viaHWCursorInit(ScreenPtr pScreen)
3702 case VIA_P4M900:
3703 case VIA_VX800:
3704 case VIA_VX855:
3705+ case VIA_VX900:
3706 if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
3707 pVia->CursorRegControl = VIA_REG_HI_CONTROL0;
3708 pVia->CursorRegBase = VIA_REG_HI_BASE0;
3709@@ -145,9 +146,12 @@ viaHWCursorInit(ScreenPtr pScreen)
3710 infoPtr->ShowCursor = viaShowCursor;
3711 infoPtr->UseHWCursor = viaUseHWCursor;
3712
3713+ /* ARGB Cursor init */
3714 infoPtr->UseHWCursorARGB = viaUseHWCursorARGB;
3715- if (pVia->CursorARGBSupported)
3716+ if (pVia->CursorARGBSupported) {
3717+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "HWCursor ARGB enabled\n"));
3718 infoPtr->LoadCursorARGB = viaLoadCursorARGB;
3719+ }
3720
3721 /* Set cursor location in frame buffer. */
3722 VIASETREG(VIA_REG_CURSOR_MODE, pVia->cursorOffset);
3723@@ -166,6 +170,7 @@ viaHWCursorInit(ScreenPtr pScreen)
3724 case VIA_P4M900:
3725 case VIA_VX800:
3726 case VIA_VX855:
3727+ case VIA_VX900:
3728 if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
3729 VIASETREG(VIA_REG_PRIM_HI_INVTCOLOR, 0x00FFFFFF);
3730 VIASETREG(VIA_REG_V327_HI_INVTCOLOR, 0x00FFFFFF);
3731@@ -225,6 +230,7 @@ viaCursorStore(ScrnInfoPtr pScrn)
3732 case VIA_P4M900:
3733 case VIA_VX800:
3734 case VIA_VX855:
3735+ case VIA_VX900:
3736 if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
3737 pVia->CursorPrimHiInvtColor = VIAGETREG(VIA_REG_PRIM_HI_INVTCOLOR);
3738 pVia->CursorV327HiInvtColor = VIAGETREG(VIA_REG_V327_HI_INVTCOLOR);
3739@@ -265,6 +271,7 @@ viaCursorRestore(ScrnInfoPtr pScrn)
3740 case VIA_P4M900:
3741 case VIA_VX800:
3742 case VIA_VX855:
3743+ case VIA_VX900:
3744 if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
3745 VIASETREG(VIA_REG_PRIM_HI_INVTCOLOR, pVia->CursorPrimHiInvtColor);
3746 VIASETREG(VIA_REG_V327_HI_INVTCOLOR, pVia->CursorV327HiInvtColor);
3747@@ -284,7 +291,7 @@ viaCursorRestore(ScrnInfoPtr pScrn)
3748 }
3749
3750 /*
3751- * ARGB Cursor
3752+ * display the current cursor
3753 */
3754
3755 void
3756@@ -298,6 +305,7 @@ viaShowCursor(ScrnInfoPtr pScrn)
3757 case VIA_P4M900:
3758 case VIA_VX800:
3759 case VIA_VX855:
3760+ case VIA_VX900:
3761 if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
3762 VIASETREG(VIA_REG_HI_CONTROL0, 0x36000005);
3763 }
3764@@ -319,13 +327,19 @@ viaShowCursor(ScrnInfoPtr pScrn)
3765 */
3766
3767 /* Duoview */
3768- if (pVia->CursorPipe)
3769+ if (pVia->CursorPipe) {
3770+ /* Mono Cursor Display Path [bit31]: Secondary */
3771+ /* FIXME For CLE266 and KM400 try to enable 32x32 cursor size [bit1] */
3772 VIASETREG(VIA_REG_ALPHA_CONTROL, 0xF6000005);
3773- else
3774+ } else {
3775+ /* Mono Cursor Display Path [bit31]: Primary */
3776 VIASETREG(VIA_REG_ALPHA_CONTROL, 0x76000005);
3777+ }
3778 }
3779 }
3780
3781+
3782+/* hide the current cursor */
3783 void
3784 viaHideCursor(ScrnInfoPtr pScrn)
3785 {
3786@@ -338,6 +352,7 @@ viaHideCursor(ScrnInfoPtr pScrn)
3787 case VIA_P4M900:
3788 case VIA_VX800:
3789 case VIA_VX855:
3790+ case VIA_VX900:
3791 if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
3792 temp = VIAGETREG(VIA_REG_HI_CONTROL0);
3793 VIASETREG(VIA_REG_HI_CONTROL0, temp & 0xFFFFFFFA);
3794@@ -350,10 +365,16 @@ viaHideCursor(ScrnInfoPtr pScrn)
3795
3796 default:
3797 temp = VIAGETREG(VIA_REG_ALPHA_CONTROL);
3798+ /* Hardware cursor disable [bit0] */
3799 VIASETREG(VIA_REG_ALPHA_CONTROL, temp & 0xFFFFFFFA);
3800 }
3801 }
3802
3803+/*
3804+ Set the cursor position to (x,y). X and/or y may be negative
3805+ indicating that the cursor image is partially offscreen on
3806+ the left and/or top edges of the screen.
3807+*/
3808 static void
3809 viaSetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
3810 {
3811@@ -380,6 +401,7 @@ viaSetCursorPosition(ScrnInfoPtr pScrn, int x, int
3812 case VIA_P4M900:
3813 case VIA_VX800:
3814 case VIA_VX855:
3815+ case VIA_VX900:
3816 if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
3817 VIASETREG(VIA_REG_HI_POS0, ((x << 16) | (y & 0x07ff)));
3818 VIASETREG(VIA_REG_HI_OFFSET0, ((xoff << 16) | (yoff & 0x07ff)));
3819@@ -409,6 +431,15 @@ viaUseHWCursorARGB(ScreenPtr pScreen, CursorPtr pC
3820 && pCurs->bits->height <= pVia->CursorMaxHeight);
3821 }
3822
3823+/*
3824+ If the driver is unable to use a hardware cursor for reasons
3825+ other than the cursor being larger than the maximum specified
3826+ in the MaxWidth or MaxHeight field below, it can supply the
3827+ UseHWCursor function. If UseHWCursor is provided by the driver,
3828+ it will be called whenever the cursor shape changes or the video
3829+ mode changes. This is useful for when the hardware cursor cannot
3830+ be used in interlaced or doublescan modes.
3831+*/
3832 static Bool
3833 viaUseHWCursor(ScreenPtr pScreen, CursorPtr pCurs)
3834 {
3835@@ -423,8 +454,11 @@ viaUseHWCursor(ScreenPtr pScreen, CursorPtr pCurs)
3836 && pCurs->bits->height <= pVia->CursorMaxHeight);
3837 }
3838
3839+/*
3840+ Load Mono Cursor Image
3841+*/
3842 static void
3843-viaLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *s)
3844+viaLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src)
3845 {
3846 VIAPtr pVia = VIAPTR(pScrn);
3847 CARD32 temp;
3848@@ -439,7 +473,7 @@ static void
3849 if (pVia->CursorARGBSupported) {
3850 #define ARGB_PER_CHUNK (8 * sizeof (chunk) / 2)
3851 for (i = 0; i < (pVia->CursorMaxWidth * pVia->CursorMaxHeight / ARGB_PER_CHUNK); i++) {
3852- chunk = *s++;
3853+ chunk = *src++;
3854 for (j = 0; j < ARGB_PER_CHUNK; j++, chunk >>= 2)
3855 *dst++ = mono_cursor_color[chunk & 3];
3856 }
3857@@ -447,7 +481,7 @@ static void
3858 pVia->CursorFG = mono_cursor_color[3];
3859 pVia->CursorBG = mono_cursor_color[2];
3860 } else {
3861- memcpy(dst, (CARD8*)s, pVia->CursorSize);
3862+ memcpy(dst, (CARD8*)src, pVia->CursorSize);
3863 }
3864 switch(pVia->Chipset) {
3865 case VIA_CX700:
3866@@ -455,6 +489,7 @@ static void
3867 case VIA_P4M900:
3868 case VIA_VX800:
3869 case VIA_VX855:
3870+ case VIA_VX900:
3871 if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
3872 temp = VIAGETREG(VIA_REG_HI_CONTROL0);
3873 VIASETREG(VIA_REG_HI_CONTROL0, temp & 0xFFFFFFFE);
3874@@ -471,11 +506,17 @@ static void
3875 }
3876 }
3877
3878+/*
3879+ Set the cursor foreground and background colors. In 8bpp, fg and
3880+ bg are indices into the current colormap unless the
3881+ HARDWARE_CURSOR_TRUECOLOR_AT_8BPP flag is set. In that case
3882+ and in all other bpps the fg and bg are in 8-8-8 RGB format.
3883+*/
3884+
3885 static void
3886 viaSetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
3887 {
3888 VIAPtr pVia = VIAPTR(pScrn);
3889- CARD32 control = pVia->CursorRegControl;
3890 CARD32 pixel;
3891 CARD32 temp;
3892 CARD32 *dst;
3893@@ -487,12 +528,10 @@ viaSetCursorColors(ScrnInfoPtr pScrn, int bg, int
3894 fg |= 0xff000000;
3895 bg |= 0xff000000;
3896
3897+ /* Don't recolour the image if we don't have to. */
3898 if (fg == pVia->CursorFG && bg == pVia->CursorBG)
3899 return;
3900
3901- temp = VIAGETREG(control);
3902- VIASETREG(control, temp & 0xFFFFFFFE);
3903-
3904 dst = (CARD32*)pVia->cursorMap;
3905 for (i = 0; i < pVia->CursorMaxWidth * pVia->CursorMaxHeight; i++, dst++)
3906 if ((pixel = *dst))
3907@@ -507,6 +546,7 @@ viaSetCursorColors(ScrnInfoPtr pScrn, int bg, int
3908 case VIA_P4M900:
3909 case VIA_VX800:
3910 case VIA_VX855:
3911+ case VIA_VX900:
3912 if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
3913 temp = VIAGETREG(VIA_REG_HI_CONTROL0);
3914 VIASETREG(VIA_REG_HI_CONTROL0, temp & 0xFFFFFFFE);
3915@@ -517,7 +557,8 @@ viaSetCursorColors(ScrnInfoPtr pScrn, int bg, int
3916 }
3917 break;
3918 default:
3919- VIASETREG(control, temp);
3920+ temp = VIAGETREG(VIA_REG_ALPHA_CONTROL);
3921+ VIASETREG(VIA_REG_ALPHA_CONTROL, temp & 0xFFFFFFFE);
3922 }
3923 }
3924
3925Index: src/via_i2c.c
3926===================================================================
3927--- a/src/via_i2c.c (.../tags/release_0_2_904) (revision 916)
3928+++ b/src/via_i2c.c (.../trunk) (revision 916)
3929@@ -365,9 +365,18 @@ ViaI2CInit(ScrnInfoPtr pScrn)
3930
3931 DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaI2CInit\n"));
3932
3933- pVia->pI2CBus1 = ViaI2CBus1Init(pScrn->scrnIndex);
3934- pVia->pI2CBus2 = ViaI2CBus2Init(pScrn->scrnIndex);
3935- pVia->pI2CBus3 = ViaI2CBus3Init(pScrn->scrnIndex);
3936+ if (!pVia->I2CDevices) {
3937+ pVia->pI2CBus1 = ViaI2CBus1Init(pScrn->scrnIndex);
3938+ pVia->pI2CBus2 = ViaI2CBus2Init(pScrn->scrnIndex);
3939+ pVia->pI2CBus3 = ViaI2CBus3Init(pScrn->scrnIndex);
3940+ } else {
3941+ if (pVia->I2CDevices & VIA_I2C_BUS1)
3942+ pVia->pI2CBus1 = ViaI2CBus1Init(pScrn->scrnIndex);
3943+ if (pVia->I2CDevices & VIA_I2C_BUS2)
3944+ pVia->pI2CBus2 = ViaI2CBus2Init(pScrn->scrnIndex);
3945+ if (pVia->I2CDevices & VIA_I2C_BUS3)
3946+ pVia->pI2CBus3 = ViaI2CBus3Init(pScrn->scrnIndex);
3947+ }
3948
3949 #ifdef HAVE_DEBUG
3950 if (pVia->I2CScan) {
3951Index: src/via_dri.c
3952===================================================================
3953--- a/src/via_dri.c (.../tags/release_0_2_904) (revision 916)
3954+++ b/src/via_dri.c (.../trunk) (revision 916)
3955@@ -187,7 +187,7 @@ VIADRIRingBufferInit(ScrnInfoPtr pScrn)
3956 return FALSE;
3957
3958 /*
3959- * Info frome code-snippet on DRI-DEVEL list; Erdi Chen.
3960+ * Info from code-snippet on DRI-DEVEL list; Erdi Chen.
3961 */
3962
3963 switch (pVia->ChipId) {
3964@@ -267,6 +267,7 @@ VIADRIAgpInit(ScreenPtr pScreen, VIAPtr pVia)
3965 pVIADRI = pDRIInfo->devPrivate;
3966 pVia->agpSize = 0;
3967
3968+
3969 if (drmAgpAcquire(pVia->drmFD) < 0) {
3970 xf86DrvMsg(pScreen->myNum, X_ERROR, "[drm] drmAgpAcquire failed %d\n",
3971 errno);
3972@@ -431,17 +432,17 @@ VIAInitVisualConfigs(ScreenPtr pScreen)
3973 if (pScrn->bitsPerPixel == 16 || pScrn->bitsPerPixel == 32) {
3974 numConfigs = 12;
3975 if (!(pConfigs = (__GLXvisualConfig *)
3976- xcalloc(sizeof(__GLXvisualConfig), numConfigs)))
3977+ calloc(sizeof(__GLXvisualConfig), numConfigs)))
3978 return FALSE;
3979 if (!(pVIAConfigs = (VIAConfigPrivPtr)
3980- xcalloc(sizeof(VIAConfigPrivRec), numConfigs))) {
3981- xfree(pConfigs);
3982+ calloc(sizeof(VIAConfigPrivRec), numConfigs))) {
3983+ free(pConfigs);
3984 return FALSE;
3985 }
3986 if (!(pVIAConfigPtrs = (VIAConfigPrivPtr *)
3987- xcalloc(sizeof(VIAConfigPrivPtr), numConfigs))) {
3988- xfree(pConfigs);
3989- xfree(pVIAConfigs);
3990+ calloc(sizeof(VIAConfigPrivPtr), numConfigs))) {
3991+ free(pConfigs);
3992+ free(pVIAConfigs);
3993 return FALSE;
3994 }
3995 for (i = 0; i < numConfigs; i++)
3996@@ -593,23 +594,28 @@ VIADRIScreenInit(ScreenPtr pScreen)
3997 case VIA_P4M900:
3998 case VIA_VX800:
3999 case VIA_VX855:
4000+ case VIA_VX900:
4001 pDRIInfo->clientDriverName = "swrast";
4002 break;
4003 default:
4004 pDRIInfo->clientDriverName = VIAClientDriverName;
4005 break;
4006 }
4007- pDRIInfo->busIdString = xalloc(64);
4008- sprintf(pDRIInfo->busIdString, "PCI:%d:%d:%d",
4009+ if (xf86LoaderCheckSymbol("DRICreatePCIBusID")) {
4010+ pDRIInfo->busIdString = DRICreatePCIBusID(pVia->PciInfo);
4011+ } else {
4012+ pDRIInfo->busIdString = malloc(64);
4013+ sprintf(pDRIInfo->busIdString, "PCI:%d:%d:%d",
4014 #ifdef XSERVER_LIBPCIACCESS
4015- ((pVia->PciInfo->domain << 8) | pVia->PciInfo->bus),
4016- pVia->PciInfo->dev, pVia->PciInfo->func
4017+ ((pVia->PciInfo->domain << 8) | pVia->PciInfo->bus),
4018+ pVia->PciInfo->dev, pVia->PciInfo->func
4019 #else
4020- ((pciConfigPtr)pVia->PciInfo->thisCard)->busnum,
4021- ((pciConfigPtr)pVia->PciInfo->thisCard)->devnum,
4022- ((pciConfigPtr)pVia->PciInfo->thisCard)->funcnum
4023+ ((pciConfigPtr)pVia->PciInfo->thisCard)->busnum,
4024+ ((pciConfigPtr)pVia->PciInfo->thisCard)->devnum,
4025+ ((pciConfigPtr)pVia->PciInfo->thisCard)->funcnum
4026 #endif
4027- );
4028+ );
4029+ }
4030 pDRIInfo->ddxDriverMajorVersion = VIA_DRIDDX_VERSION_MAJOR;
4031 pDRIInfo->ddxDriverMinorVersion = VIA_DRIDDX_VERSION_MINOR;
4032 pDRIInfo->ddxDriverPatchVersion = VIA_DRIDDX_VERSION_PATCH;
4033@@ -646,7 +652,7 @@ VIADRIScreenInit(ScreenPtr pScreen)
4034 pDRIInfo->SAREASize = SAREA_MAX;
4035 #endif
4036
4037- if (!(pVIADRI = (VIADRIPtr) xcalloc(sizeof(VIADRIRec), 1))) {
4038+ if (!(pVIADRI = (VIADRIPtr) calloc(sizeof(VIADRIRec), 1))) {
4039 DRIDestroyInfoRec(pVia->pDRIInfo);
4040 pVia->pDRIInfo = NULL;
4041 return FALSE;
4042@@ -665,7 +671,7 @@ VIADRIScreenInit(ScreenPtr pScreen)
4043 if (!DRIScreenInit(pScreen, pDRIInfo, &pVia->drmFD)) {
4044 xf86DrvMsg(pScreen->myNum, X_ERROR,
4045 "[dri] DRIScreenInit failed. Disabling DRI.\n");
4046- xfree(pDRIInfo->devPrivate);
4047+ free(pDRIInfo->devPrivate);
4048 pDRIInfo->devPrivate = NULL;
4049 DRIDestroyInfoRec(pVia->pDRIInfo);
4050 pVia->pDRIInfo = NULL;
4051@@ -748,7 +754,7 @@ VIADRICloseScreen(ScreenPtr pScreen)
4052 if (pVia->pDRIInfo) {
4053 if ((pVIADRI = (VIADRIPtr) pVia->pDRIInfo->devPrivate)) {
4054 VIADRIIrqExit(pScrn, pVIADRI);
4055- xfree(pVIADRI);
4056+ free(pVIADRI);
4057 pVia->pDRIInfo->devPrivate = NULL;
4058 }
4059 DRIDestroyInfoRec(pVia->pDRIInfo);
4060@@ -756,11 +762,11 @@ VIADRICloseScreen(ScreenPtr pScreen)
4061 }
4062
4063 if (pVia->pVisualConfigs) {
4064- xfree(pVia->pVisualConfigs);
4065+ free(pVia->pVisualConfigs);
4066 pVia->pVisualConfigs = NULL;
4067 }
4068 if (pVia->pVisualConfigsPriv) {
4069- xfree(pVia->pVisualConfigsPriv);
4070+ free(pVia->pVisualConfigsPriv);
4071 pVia->pVisualConfigsPriv = NULL;
4072 }
4073 }
4074Index: src/via.h
4075===================================================================
4076--- a/src/via.h (.../tags/release_0_2_904) (revision 916)
4077+++ b/src/via.h (.../trunk) (revision 916)
4078@@ -34,7 +34,7 @@
4079
4080 /* Video Engines */
4081 #define VIDEO_ENGINE_UNK 0 /* Unknown video engine */
4082-#define VIDEO_ENGINE_CLE 1 /* CLE First generaion video engine */
4083+#define VIDEO_ENGINE_CLE 1 /* CLE First generation video engine */
4084 #define VIDEO_ENGINE_CME 2 /* CME Second generation video engine */
4085
4086 /* Video status flag */
4087@@ -215,6 +215,9 @@
4088 #define HQV_DST_STRIDE 0x1F4
4089 #define HQV_SRC_STRIDE 0x1F8
4090
4091+#define HQV_H_SCALE_CONTROL 0x1B0
4092+#define HQV_V_SCALE_CONTROL 0x1B4
4093+
4094 #define PRO_HQV1_OFFSET 0x1000
4095 /*
4096 * Video command definition
4097@@ -515,7 +518,23 @@
4098 #define HQV_FIFO_STATUS 0x00001000
4099 #define HQV_GEN_IRQ 0x00000080
4100 #define HQV_FIFO_DEPTH_1 0x00010000
4101+/* for CME engine */
4102+#define HQV_SW_FLIP_QUEUE_ENABLE 0x00100000
4103
4104+/* for hwDiff->dwNewScaleCtl */
4105+#define HQV_H_SCALE_ENABLE 0x80000000
4106+#define HQV_H_SCALE_UP 0x00000000
4107+#define HQV_H_SCALE_DOWN_FOURTH_TO_1 0x10000000
4108+#define HQV_H_SCALE_DOWN_FOURTH_TO_EIGHTH 0x20000000
4109+#define HQV_H_SCALE_DOWN_UNDER_EIGHTH 0x30000000
4110+
4111+#define HQV_V_SCALE_ENABLE 0x80000000
4112+#define HQV_V_SCALE_UP 0x00000000
4113+#define HQV_V_SCALE_DOWN 0x10000000
4114+
4115+/* HQV Default Vodeo Color 0x3B8 */
4116+#define HQV_FIX_COLOR 0x0643212c
4117+
4118 /* HQV_FILTER_CONTROL 0x3E4 */
4119 #define HQV_H_LOWPASS_2TAP 0x00000001
4120 #define HQV_H_LOWPASS_4TAP 0x00000002
4121@@ -575,6 +594,25 @@
4122 #define HQV_VDEBLOCK_FILTER 0x80000000
4123 #define HQV_HDEBLOCK_FILTER 0x00008000
4124
4125+/* new added registers for VT3409.For some registers have different meanings
4126+ * but the same address,we add postfix _409 to distinguish */
4127+#define HQV_COLOR_ADJUSTMENT_PRE_CTRL1 0x160
4128+#define HQV_COLOR_ADJUSTMENT_PRE_CTRL2 0x164
4129+#define HQV_COLOR_ADJUSTMENT_PRE_CTRL3 0x168
4130+#define HQV_COLOR_ADJUSTMENT_PRE_CTRL4 0x16C
4131+#define HQV_SRC_DATA_OFFSET_CTRL1_409 0x170
4132+#define HQV_SRC_DATA_OFFSET_CTRL2_409 0x174
4133+#define HQV_SRC_DATA_OFFSET_CTRL3_409 0x178
4134+#define HQV_SRC_DATA_OFFSET_CTRL4_409 0x17C
4135+#define HQV_DST_DATA_OFFSET_CTRL1 0x180
4136+#define HQV_DST_DATA_OFFSET_CTRL2 0x184
4137+#define HQV_DST_DATA_OFFSET_CTRL3 0x188
4138+#define HQV_DST_DATA_OFFSET_CTRL4 0x18C
4139+#define HQV_RESIDUE_PIXEL_FRAME_STARTADDR 0x1BC
4140+#define HQV_BACKGROUND_DATA_OFFSET 0x1CC
4141+#define HQV_SUBP_HSCALE_CTRL 0x1E0
4142+#define HQV_SUBP_VSCALE_CTRL 0x1E8
4143+
4144 /* Add new HQV Registers for VT3353: */
4145 #define HQV_SRC_DATA_OFFSET_CONTROL1 0x180
4146 #define HQV_SRC_DATA_OFFSET_CONTROL2 0x184
4147@@ -588,6 +626,7 @@
4148 #define HQV_COLOR_ADJUSTMENT_CONTROL2 0x1A4
4149 #define HQV_COLOR_ADJUSTMENT_CONTROL3 0x1A8
4150 #define HQV_COLOR_ADJUSTMENT_CONTROL5 0x1AC
4151+#define HQV_DEFAULT_VIDEO_COLOR 0x1B8
4152
4153 #define CHROMA_KEY_LOW 0x00FFFFFF
4154 #define CHROMA_KEY_HIGH 0x00FFFFFF
4155Index: man/openchrome.man
4156===================================================================
4157--- a/man/openchrome.man (.../tags/release_0_2_904) (revision 916)
4158+++ b/man/openchrome.man (.../trunk) (revision 916)
4159@@ -22,7 +22,7 @@ The
4160 .B openchrome
4161 driver supports the following chipsets: CLE266, KM400/KN400/KM400A/P4M800,
4162 CN400/PM800/PN800/PM880, K8M800, CN700/VM800/P4M800Pro, CX700, P4M890, K8M890,
4163-P4M900/VN896/CN896, VX800 and VX855.
4164+P4M900/VN896/CN896, VX800, VX855 and VX900.
4165 The driver includes 2D acceleration and Xv video overlay extensions.
4166 Flat panel, TV, and VGA outputs are supported, depending on the hardware
4167 configuration.
4168@@ -59,16 +59,18 @@ are supported:
4169 .BI "Option \*qAccelMethod\*q \*q" string \*q
4170 The driver supports "XAA" and "EXA" acceleration methods. The default
4171 method is XAA, since EXA is still experimental. Contrary to XAA, EXA
4172-implements acceleration for screen uploads and downlads (if DRI is
4173+implements acceleration for screen uploads and downloads (if DRI is
4174 enabled) and for the Render/Composite extension.
4175 .TP
4176 .BI "Option \*qActiveDevice\*q \*q" string \*q
4177 Specifies the active device combination. Any string containing "CRT",
4178 "LCD", "DFP", "TV" should be possible. "CRT" represents anything that
4179-is connected to the VGA port, "LCD" and "DFP" are for laptop panels
4180-(not TFT screens attached to the VGA port), "TV" is self-explanatory.
4181+is connected to the VGA port, "LCD" is for laptop panels (not TFT screens
4182+attached to the VGA port), "DFP" is for screens connected to the DVI port,
4183+"TV" is self-explanatory.
4184 The default is to use what is detected. The driver is currently unable
4185-to use LCD and TV simultaneously, and will favour the LCD.
4186+to use LCD and TV simultaneously, and will favour the LCD. The DVI port is
4187+not properly probed and needs to be enabled with this option.
4188 .TP
4189 .BI "Option \*qAGPMem\*q \*q" integer \*q
4190 Sets the amount of AGP memory that is allocated at X server startup.
4191@@ -81,7 +83,7 @@ EXA scratch area in AGP space, it will be allocate
4192 no room for DRI textures, they will be allocated from the DRI part of
4193 VRAM (see the option "MaxDRIMem"). The default amount of AGP is
4194 32768 kB. Note that the AGP aperture set in the BIOS must be able
4195-to accomodate the amount of AGP memory specified here. Otherwise no
4196+to accommodate the amount of AGP memory specified here. Otherwise no
4197 AGP memory will be available. It is safe to set a very large AGP
4198 aperture in the BIOS.
4199 .TP
4200@@ -131,10 +133,10 @@ as possible to the EXA pixmap storage area.
4201 .TP
4202 .BI "Option \*qMigrationHeuristic\*q \*q" string \*q
4203 Sets the heuristic for EXA pixmap migration. This is an EXA core
4204-option, and on Xorg server versions after 1.1.0 this defaults to
4205-"smart". The openchrome driver performs best with "greedy", so you
4206+option, and starting from __xservername__ server version 1.3.0 this defaults to
4207+"always". The openchrome driver performs best with "greedy", so you
4208 should really add this option to your configuration file. The third
4209-possibility is "always", which might become more useful in the future.
4210+possibility is "smart".
4211 .TP
4212 .BI "Option \*qNoAccel\*q \*q" boolean \*q
4213 Disables the use of hardware acceleration. Acceleration is enabled
4214@@ -159,9 +161,16 @@ Specifies the size (width x height) of the LCD pan
4215 system. The sizes 640x480, 800x600, 1024x768, 1280x1024, and 1400x1050
4216 are supported.
4217 .TP
4218+.BI "Option \*qRotationType\*q \*q" string \*q
4219+Enabled rotation by using RandR. The driver only support unaccelerated
4220+RandR rotations "SWRandR". Hardware rotations "HWRandR" is currently
4221+unimplemented.
4222+.TP
4223 .BI "Option \*qRotate\*q \*q" string \*q
4224 Rotates the display either clockwise ("CW"), counterclockwise ("CCW") and
4225-upside-down ("UD"). Rotation is only supported unaccelerated.
4226+upside-down ("UD"). Rotation is only supported unaccelerated. Adding
4227+option "Rotate", enables RandR rotation feature. The RandR allows
4228+clients to dynamically change X screens.
4229 .TP
4230 .BI "Option \*qShadowFB\*q \*q" boolean \*q
4231 Enables the use of a shadow frame buffer. This is required when
4232@@ -234,6 +243,6 @@ overscan). These modes are made available by the
4233 provided in __xconfigfile__ will be ignored.
4234
4235 .SH "SEE ALSO"
4236-__xservername__(__appmansuffix__), __xconfigfile__(__filemansuffix__), Xserver(__appmansuffix__), X(__miscmansuffix__)
4237+__xservername__(__appmansuffix__), __xconfigfile__(__filemansuffix__), Xserver(__appmansuffix__), X(__miscmansuffix__), EXA(__filemansuffix__), Xv(__filemansuffix__)
4238 .SH AUTHORS
4239 Authors include: ...
4240Index: src/via_dga.c
4241===================================================================
4242--- a/src/via_dga.c (.../tags/release_0_2_904) (revision 916)
4243+++ b/src/via_dga.c (.../trunk) (revision 916)
4244@@ -89,16 +89,16 @@ VIASetupDGAMode(
4245 otherPitch = secondPitch ? secondPitch : pMode->HDisplay;
4246
4247 if (pMode->HDisplay != otherPitch) {
4248- newmodes = xrealloc(modes, (*num + 2) * sizeof(DGAModeRec));
4249+ newmodes = realloc(modes, (*num + 2) * sizeof(DGAModeRec));
4250 oneMore = TRUE;
4251 }
4252 else {
4253- newmodes = xrealloc(modes, (*num + 1) * sizeof(DGAModeRec));
4254+ newmodes = realloc(modes, (*num + 1) * sizeof(DGAModeRec));
4255 oneMore = FALSE;
4256 }
4257
4258 if (!newmodes) {
4259- xfree(modes);
4260+ free(modes);
4261 return NULL;
4262 }
4263
4264Index: src/via_id.c
4265===================================================================
4266--- a/src/via_id.c (.../tags/release_0_2_904) (revision 916)
4267+++ b/src/via_id.c (.../trunk) (revision 916)
4268@@ -63,6 +63,7 @@ static struct ViaCardIdStruct ViaCardId[] = {
4269 {"Giga-byte 7VM400(A)M", VIA_KM400, 0x1458, 0xD000, VIA_DEVICE_CRT},
4270 {"MSI KM4(A)M-V", VIA_KM400, 0x1462, 0x7061, VIA_DEVICE_CRT}, /* aka "DFI KM400-MLV" */
4271 {"MSI PM8M2-V", VIA_KM400, 0x1462, 0x7071, VIA_DEVICE_CRT},
4272+ {"MSI PM8M-V", VIA_KM400, 0x1462, 0x7104, VIA_DEVICE_CRT},
4273 {"MSI KM4(A)M-L", VIA_KM400, 0x1462, 0x7348, VIA_DEVICE_CRT},
4274 {"Abit VA-10 (1)", VIA_KM400, 0x147B, 0x140B, VIA_DEVICE_CRT},
4275 {"Abit VA-10 (2)", VIA_KM400, 0x147B, 0x140C, VIA_DEVICE_CRT},
4276@@ -114,6 +115,7 @@ static struct ViaCardIdStruct ViaCardId[] = {
4277 {"Packard Bell Easynote B3 800/B3340", VIA_K8M800, 0x1631, 0xC009, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
4278 {"Packard Bell Imedia 2097", VIA_K8M800, 0x1631, 0xD007, VIA_DEVICE_CRT},
4279 {"Fujitsu-Siemens Amilo K7610", VIA_K8M800, 0x1734, 0x10B3, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
4280+ {"Lenovo ThinkCenter E51 8714", VIA_K8M800, 0x17AA, 0x1008, VIA_DEVICE_CRT},
4281 {"ASRock K8Upgrade-VM800", VIA_K8M800, 0x1849, 0x3108, VIA_DEVICE_CRT},
4282 {"Axper XP-M8VM800", VIA_K8M800, 0x1940, 0xD000, VIA_DEVICE_CRT},
4283
4284@@ -138,6 +140,7 @@ static struct ViaCardIdStruct ViaCardId[] = {
4285 {"Haier A60-440256080BD", VIA_VM800, 0x1019, 0x0F79, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
4286 {"PCChips P23G", VIA_VM800, 0x1019, 0x1623, VIA_DEVICE_CRT},
4287 {"ECS P4M800PRO-M", VIA_VM800, 0x1019, 0x2122, VIA_DEVICE_CRT},
4288+ {"ECS P4M800PRO-M2 (V2.0)", VIA_VM800, 0x1019, 0x2123, VIA_DEVICE_CRT},
4289 {"ECS C7VCM", VIA_VM800, 0x1019, 0xAA2D, VIA_DEVICE_CRT},
4290 {"PCChips V21G", VIA_VM800, 0x1019, 0xAA51, VIA_DEVICE_CRT},
4291 {"Asustek P5VDC-MX", VIA_VM800, 0x1043, 0x3344, VIA_DEVICE_CRT},
4292@@ -152,6 +155,7 @@ static struct ViaCardIdStruct ViaCardId[] = {
4293 {"MSI PM8PM", VIA_VM800, 0x1462, 0x7222, VIA_DEVICE_CRT},
4294 {"Twinhead M6", VIA_VM800, 0x14FF, 0xA007, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
4295 {"RoverBook Partner W500", VIA_VM800, 0x1509, 0x4330, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
4296+ {"FIC PTM800Pro LF", VIA_VM800, 0x1509, 0x601A, VIA_DEVICE_CRT},
4297 {"Clevo/RoverBook Voyager V511L", VIA_VM800, 0x1558, 0x0662, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
4298 {"Clevo M5xxS", VIA_VM800, 0x1558, 0x5406, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
4299 {"Biostar P4M80-M4 / P4VMA-M", VIA_VM800, 0x1565, 0x1202, VIA_DEVICE_CRT},
4300@@ -170,6 +174,7 @@ static struct ViaCardIdStruct ViaCardId[] = {
4301 {"Asustek M2V-MX SE", VIA_K8M890, 0x1043, 0x8297, VIA_DEVICE_CRT},
4302 {"Foxconn K8M890M2MA-RS2H", VIA_K8M890, 0x105B, 0x0C84, VIA_DEVICE_CRT},
4303 {"Shuttle FX22V1", VIA_K8M890, 0x1297, 0x3080, VIA_DEVICE_CRT},
4304+ {"MSI K8M890M2-V", VIA_K8M890, 0x1462, 0x7139, VIA_DEVICE_CRT},
4305 {"MSI K9VGM-V", VIA_K8M890, 0x1462, 0x7253, VIA_DEVICE_CRT},
4306 {"Averatec 226x", VIA_K8M890, 0x14FF, 0xA002, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
4307 {"Fujitsu/Siemens Amilo La 1703", VIA_K8M890, 0x1734, 0x10D9, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
4308@@ -183,12 +188,13 @@ static struct ViaCardIdStruct ViaCardId[] = {
4309 {"Mitac 8515", VIA_P4M900, 0x1071, 0x8515, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
4310 {"Medion Notebook MD96483", VIA_P4M900, 0x1071, 0x8615, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
4311 {"Mitac 8624", VIA_P4M900, 0x1071, 0x8624, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
4312- {"VIA VT3364 (P4M900)", VIA_P4M900, 0x1106, 0x3371, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
4313+ {"VIA VB8001 Mini-ITX Board (P4M900)", VIA_P4M900, 0x1106, 0x3371, VIA_DEVICE_CRT},
4314 {"Gigabyte GA-VM900M", VIA_P4M900, 0x1458, 0xD000, VIA_DEVICE_CRT},
4315 {"MSI VR321", VIA_P4M900, 0x1462, 0x3355, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
4316 {"MSI P4M900M / P4M900M2-F/L", VIA_P4M900, 0x1462, 0x7255, VIA_DEVICE_CRT},
4317 {"MSI P4M900M3-L", VIA_P4M900, 0x1462, 0x7387, VIA_DEVICE_CRT},
4318 {"Twinhead H12V", VIA_P4M900, 0x14FF, 0xA00F, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
4319+ {"Twinhead K15V", VIA_P4M900, 0x14FF, 0xA012, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
4320 {"Everex NC1501/NC1503", VIA_P4M900, 0x1509, 0x1E30, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
4321 {"Clevo M660SE", VIA_P4M900, 0x1558, 0x0664, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
4322 {"Clevo M660SR", VIA_P4M900, 0x1558, 0x0669, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
4323@@ -198,6 +204,7 @@ static struct ViaCardIdStruct ViaCardId[] = {
4324 {"Fujitsu/Siemens Amilo Pro V3515", VIA_P4M900, 0x1734, 0x10CB, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
4325 {"Fujitsu/Siemens Amilo Li1705", VIA_P4M900, 0x1734, 0x10F7, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
4326 {"ASRock P4VM900-SATA2", VIA_P4M900, 0x1849, 0x3371, VIA_DEVICE_CRT},
4327+ {"Semp Informática Notebook IS 1462", VIA_P4M900, 0x1509, 0x1D41, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
4328
4329 /*** CX700 ***/
4330 {"VIA VT8454B", VIA_CX700, 0x0908, 0x1975, VIA_DEVICE_CRT}, /* Evaluation board, reference possibly wrong */
4331@@ -224,14 +231,21 @@ static struct ViaCardIdStruct ViaCardId[] = {
4332
4333 /*** VX800 ***/
4334 {"VIA Epia M700", VIA_VX800, 0x1106, 0x1122, VIA_DEVICE_CRT},
4335+ {"Guillemot-Hercules ECafe EC900B", VIA_VX800, 0x1106, 0x3349, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
4336 {"VIA OpenBook", VIA_VX800, 0x1170, 0x0311, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, /* VIA OpenBook eNote VBE8910 */
4337 {"Samsung NC20", VIA_VX800, 0x144d, 0xc04e, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
4338+ {"FIC CE2A1", VIA_VX800, 0x1509, 0x3002, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
4339 {"Quanta DreamBook Light IL1", VIA_VX800, 0x152d, 0x0771, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
4340 {"Lenovo S12", VIA_VX800, 0x17aa, 0x388c, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
4341+ {"Siragon ML-6200", VIA_VX800, 0x1106, 0x2211, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
4342
4343 /*** VX855 ***/
4344 {"VIA VT8562C", VIA_VX855, 0x1106, 0x5122, VIA_DEVICE_CRT},
4345+ {"OLPC XO 1.5", VIA_VX855, 0x152D, 0x0833, VIA_DEVICE_LCD},
4346
4347+ /*** VX900 ***/
4348+ {"Foxconn L740", VIA_VX900, 0x105B, 0x0CFD, VIA_DEVICE_LCD | VIA_DEVICE_CRT},
4349+
4350 /* keep this */
4351 {NULL, VIA_UNKNOWN, 0x0000, 0x0000, VIA_DEVICE_NONE}
4352 };
4353Index: src/via_timing.h
4354===================================================================
4355--- a/src/via_timing.h (.../tags/release_0_2_904) (revision 916)
4356+++ b/src/via_timing.h (.../trunk) (revision 916)
4357@@ -40,7 +40,7 @@
4358 #define TIMING_CVT_WARN_REFRESH_RATE_NOT_RB 1 << 3
4359
4360 /**
4361- * Geneartes a CVT modeline
4362+ * Generates a CVT modeline
4363 * mode must not be null, if mode->name is null a new char* will be allocated.
4364 *
4365 */
diff --git a/main/xf86-video-openchrome/openchrome.xinf b/main/xf86-video-openchrome/openchrome.xinf
new file mode 100644
index 0000000000..7b15c911a9
--- /dev/null
+++ b/main/xf86-video-openchrome/openchrome.xinf
@@ -0,0 +1,39 @@
1# NOTE: Comments in openchrome 0.2.1 driver source indicate this device does not
2# exist in the wild, so it has been disabled for now.
3#alias pcivideo:v00001106d00003022sv*sd*bc*sc*i* openchrome
4
5# 1106:3108 - K8M800 (PCI_CHIP_VT3204)
6alias pcivideo:v00001106d00003108sv*sd*bc*sc*i* openchrome
7
8# 1106:3118 - PM800/PM880/CN400 (PCI_CHIP_VT3259)
9alias pcivideo:v00001106d00003118sv*sd*bc*sc*i* openchrome
10
11# 1106:3122 - CLE266 (PCI_CHIP_CLE3122)
12alias pcivideo:v00001106d00003122sv*sd*bc*sc*i* openchrome
13
14# 1106:7205 - KM400/KN400 (PCI_CHIP_VT3205)
15alias pcivideo:v00001106d00007205sv*sd*bc*sc*i* openchrome
16
17# 1106:3344 - VM800 (PCI_CHIP_VT3314)
18alias pcivideo:v00001106d00003344sv*sd*bc*sc*i* openchrome
19
20# 1106:3157 - CX700 (PCI_CHIP_VT3324)
21alias pcivideo:v00001106d00003157sv*sd*bc*sc*i* openchrome
22
23# 1106:3343 - P4M890 (PCI_CHIP_VT3327)
24alias pcivideo:v00001106d00003343sv*sd*bc*sc*i* openchrome
25
26# 1106:3230 - K8M890 (PCI_CHIP_VT3336)
27alias pcivideo:v00001106d00003230sv*sd*bc*sc*i* openchrome
28
29# 1106:3371 - P4M900 (PCI_CHIP_VT3364)
30alias pcivideo:v00001106d00003371sv*sd*bc*sc*i* openchrome
31
32# 1106:1122 - VX800 (PCI_CHIP_VT3353)
33alias pcivideo:v00001106d00001122sv*sd*bc*sc*i* openchrome
34
35# 1106:5122 - VX855 (PCI_CHIP_VT3409)
36alias pcivideo:v00001106d00005122sv*sd*bc*sc*i* openchrome
37
38# 1106:7122 - VX855 (PCI_CHIP_VT3410)
39alias pcivideo:v00001106d00007122sv*sd*bc*sc*i* openchrome
© 2015 Mike Crute